diff options
author | Grygorii Strashko <grygorii.strashko@ti.com> | 2019-12-21 13:00:04 +0200 |
---|---|---|
committer | Tero Kristo <t-kristo@ti.com> | 2020-01-20 09:41:28 +0200 |
commit | 69e300283796dae7e8c2e6acdabcd31336c0c93e (patch) | |
tree | d16d2c8840bb8292d01d19e8f2a865bc8f906da5 | |
parent | 7dfd5e619d3908d8a6876a95062a35b8e0000cd4 (diff) |
clk: ti: dra7: fix parent for gmac_clkctrl
The parent clk for gmac clk ctrl has to be gmac_main_clk (125MHz) instead
of dpll_gmac_ck (1GHz). This is caused incorrect CPSW MDIO operation.
Hence, fix it.
Fixes: dffa9051d546 ('clk: ti: dra7: add new clkctrl data')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
-rw-r--r-- | drivers/clk/ti/clk-7xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index a89b465f299b..2e86bd6d2166 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c @@ -428,7 +428,7 @@ static const struct omap_clkctrl_bit_data dra7_gmac_bit_data[] __initconst = { }; static const struct omap_clkctrl_reg_data dra7_gmac_clkctrl_regs[] __initconst = { - { DRA7_GMAC_GMAC_CLKCTRL, dra7_gmac_bit_data, CLKF_SW_SUP, "dpll_gmac_ck" }, + { DRA7_GMAC_GMAC_CLKCTRL, dra7_gmac_bit_data, CLKF_SW_SUP, "gmac_main_clk" }, { 0 }, }; |