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authorBen Widawsky <ben@bwidawsk.net>2013-09-05 14:18:36 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-10 23:29:23 +0200
commit420b1f58ac686529676c5e9ca76cb9b52fe39953 (patch)
treec5da6de9ddba169528d25813fda4b219c74cfc38
parent5e3ac77d85ddec601504f8eb1c31819a09ee2ff1 (diff)
drm/i915: Use do_switch for ILK renderctx
This patch starts the migration to the core context code for Ironlake renderctx. It is an excellent place for a bisection point due to complaining hardware, though notice that our sample size is quite limited given that only machines with RC6 turned on could notice problems. NOTE: As mentioned in a previous commit, this removes an MI_FLUSH. If issues occur, try adding that to the end of mi_set_context before complaining. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # X still works!
-rw-r--r--drivers/gpu/drm/i915/i915_gem_context.c21
1 files changed, 1 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 52d9c4bd1701..b2f61a5c1670 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -595,24 +595,5 @@ int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
int ironlake_setup_rc6_hw_context(struct drm_i915_private *dev_priv)
{
- struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
- int ret;
-
- ret = intel_ring_begin(ring, 6);
- if (ret)
- return ret;
-
- intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
- intel_ring_emit(ring, MI_SET_CONTEXT);
- intel_ring_emit(ring, i915_gem_obj_ggtt_offset(dev_priv->ips.renderctx.obj) |
- MI_MM_SPACE_GTT |
- MI_SAVE_EXT_STATE_EN |
- MI_RESTORE_EXT_STATE_EN |
- MI_RESTORE_INHIBIT);
- intel_ring_emit(ring, MI_SUSPEND_FLUSH);
- intel_ring_emit(ring, MI_NOOP);
- intel_ring_emit(ring, MI_FLUSH);
- intel_ring_advance(ring);
-
- return 0;
+ return do_switch(&dev_priv->ips.renderctx);
}