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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2012-08-10 10:03:03 -0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-10 18:35:28 +0200
commit126e9be816e7c0322f5dac994f94d65a8fabcc56 (patch)
tree448a58326f9125987d8e3b3383240477f1051040 /drivers/message
parent228d3e367c91af16d672fb8bff78b030acb5efc3 (diff)
drm/i915: try harder to find WR PLL clock settings
If we don't find the exact refresh rate, go with the next one. This makes some modes work for me. They won't have the best settings, but will at least have something. Just returning from this function when we don't find the perfect settings does not help us at all. Version 2: - Remove duplicate lines on the clock table. - Add back debug message with refresh, p, n2 and r2. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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