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authorBen Widawsky <ben@bwidawsk.net>2012-04-20 11:50:01 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-20 21:26:56 +0200
commit0e31d4ebb0dd5bbad7f998f23958710d7d96c7ed (patch)
treedf8f56eacffc437b296453e0eb22c32a220d42fa
parent3801a7fd8615365a58960561d3bd3479b485ed3e (diff)
drm/i915: rc6 residency (fix the fix)drm-intel-next-2012-04-21
Chris' fix for my 32b breakage was incorrect. do_div returns a remainder. Go back to a divide macro which is more 32b friendly. Tested on x86-64. This has only been compile tested on 32b systems. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48756 Cc: Chris Wilson <chris@chris-wilson.co.uk> Sincere-apologies: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_sysfs.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index f1b5108931f..bd6350b0adb 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -39,8 +39,8 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
if (!intel_enable_rc6(dev))
return 0;
- raw_time = I915_READ(reg) * 128ULL + 500;
- return do_div(raw_time, 100000);
+ raw_time = I915_READ(reg) * 128ULL;
+ return DIV_ROUND_UP_ULL(raw_time, 1000) / 100;
}
static ssize_t