diff options
| author | Junyan He <junyan.he@linux.intel.com> | 2015-01-06 18:00:29 +0800 |
|---|---|---|
| committer | Zhigang Gong <zhigang.gong@intel.com> | 2015-01-20 16:08:47 +0800 |
| commit | 46f7fea22f15ac33c93ca7ad335be00d7d2d9f22 (patch) | |
| tree | 447724a883b2c00a99227bd7cf0c850a4138c7e2 /backend | |
| parent | d121b52ec24edcbd9b96dcfe4634bbcfe8cdbc01 (diff) | |
Add the long unpacked ud uw into the instruction schedule consideration
Besides long and double, unpacked ud for long <8,4:2> and
unpacked uw for long <16,4:4> can also stride several registers.
We need to add the second half into the dependency when doing
instruction schedule.
Signed-off-by: Junyan He <junyan.he@linux.intel.com>
Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
Diffstat (limited to 'backend')
| -rw-r--r-- | backend/src/backend/gen_insn_scheduling.cpp | 6 | ||||
| -rw-r--r-- | backend/src/backend/gen_register.hpp | 9 |
2 files changed, 12 insertions, 3 deletions
diff --git a/backend/src/backend/gen_insn_scheduling.cpp b/backend/src/backend/gen_insn_scheduling.cpp index 5538a747..a0a25944 100644 --- a/backend/src/backend/gen_insn_scheduling.cpp +++ b/backend/src/backend/gen_insn_scheduling.cpp @@ -256,7 +256,7 @@ namespace gbe if (this->ignoreDependency(reg) == false) { const uint32_t index = this->getIndex(reg); this->addDependency(node0, index, m); - if (scheduler.policy == POST_ALLOC && (reg.isdf() || reg.isint64())) + if (scheduler.policy == POST_ALLOC && (reg.isdf() || reg.isint64() || reg.is_unpacked_long())) this->addDependency(node0, index + 1, m); } } @@ -265,7 +265,7 @@ namespace gbe if (this->ignoreDependency(reg) == false) { const uint32_t index = this->getIndex(reg); this->addDependency(index, node0, m); - if (scheduler.policy == POST_ALLOC && (reg.isdf() || reg.isint64())) + if (scheduler.policy == POST_ALLOC && (reg.isdf() || reg.isint64() || reg.is_unpacked_long())) this->addDependency(index + 1, node0, m); } } @@ -367,7 +367,7 @@ namespace gbe if (this->ignoreDependency(dst) == false) { const uint32_t index = this->getIndex(dst); this->nodes[index] = node; - if (scheduler.policy == POST_ALLOC && (dst.isdf() || dst.isint64())) + if (scheduler.policy == POST_ALLOC && (dst.isdf() || dst.isint64() || dst.is_unpacked_long())) this->nodes[index + 1] = node; } } diff --git a/backend/src/backend/gen_register.hpp b/backend/src/backend/gen_register.hpp index 2164ef70..d8a89dd4 100644 --- a/backend/src/backend/gen_register.hpp +++ b/backend/src/backend/gen_register.hpp @@ -295,6 +295,15 @@ namespace gbe return false; } + /* Besides long and double, there are also some cases which can also stride + several registers, eg. unpacked ud for long<8,4:2> and unpacked uw for + long<16,4:4> */ + INLINE bool is_unpacked_long(void) const { + if (file != GEN_GENERAL_REGISTER_FILE) return false; + if (width == GEN_WIDTH_4 && hstride > GEN_HORIZONTAL_STRIDE_1) return true; + return false; + } + INLINE bool isimmdf(void) const { if (type == GEN_TYPE_DF && file == GEN_IMMEDIATE_VALUE) return true; |