diff options
| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2017-09-17 11:59:37 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2017-10-02 15:07:44 +0200 |
| commit | 30e37289ea754302f970705f6f94b8c51c952f30 (patch) | |
| tree | 5dfb5a6e1199159c215471fa5893e6c0451f26a3 | |
| parent | a3fa3b2e025f2a7d1eed45b332a89bc0d66ee0e4 (diff) | |
radeonsi: fix maximum advertised point size / line width
The hardware registers store the half-size/width in 12.4 fixed point
format, so 8192 is the maximum.
Fixes dEQP-GLES3.functional.rasterization.*
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.c | 7 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 4 |
2 files changed, 3 insertions, 8 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index b327fd106a..949d313bb5 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -1004,17 +1004,12 @@ static const char* r600_get_name(struct pipe_screen* pscreen) static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_capf param) { - struct r600_common_screen *rscreen = (struct r600_common_screen *)pscreen; - switch (param) { case PIPE_CAPF_MAX_LINE_WIDTH: case PIPE_CAPF_MAX_LINE_WIDTH_AA: case PIPE_CAPF_MAX_POINT_WIDTH: case PIPE_CAPF_MAX_POINT_WIDTH_AA: - if (rscreen->family >= CHIP_CEDAR) - return 16384.0f; - else - return 8192.0f; + return 8192.0f; case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: return 16.0f; case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index e82ca6a694..3fbacec566 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -902,8 +902,8 @@ static void *si_create_rs_state(struct pipe_context *ctx, S_028A04_MIN_SIZE(si_pack_float_12p4(psize_min/2)) | S_028A04_MAX_SIZE(si_pack_float_12p4(psize_max/2))); - tmp = (unsigned)state->line_width * 8; - si_pm4_set_reg(pm4, R_028A08_PA_SU_LINE_CNTL, S_028A08_WIDTH(tmp)); + si_pm4_set_reg(pm4, R_028A08_PA_SU_LINE_CNTL, + S_028A08_WIDTH(si_pack_float_12p4(state->line_width/2))); si_pm4_set_reg(pm4, R_028A48_PA_SC_MODE_CNTL_0, S_028A48_LINE_STIPPLE_ENABLE(state->line_stipple_enable) | S_028A48_MSAA_ENABLE(state->multisample || |