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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2021-12-16clk: starfive: Add JH7100 clock generator driverGeert Uytterhoeven5-0/+703
2021-12-15clk: stm32mp1: remove redundant assignment to pointer dataColin Ian King1-2/+0
2021-12-15clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system en...Dillon Min1-4/+0
2021-12-15clk: Introduce clk-tps68470 driverHans de Goede3-0/+270
2021-12-15clk: tegra: Support runtime PM and power domainDmitry Osipenko8-54/+420
2021-12-15clk: tegra: Make vde a child of pll_p on tegra114Dmitry Osipenko1-1/+1
2021-12-14Merge v5.16-rc5 into drm-nextDaniel Vetter8-6/+29
2021-12-10clk: Emit a stern warning with writable debugfs enabledStephen Boyd1-0/+18
2021-12-09clk: Add write operation for clk_parent debugfs nodeSam Protsenko1-1/+41
2021-12-09clk: __clk_core_init() never takes NULLStephen Boyd1-3/+0
2021-12-09clk: clk_core_get() can also return NULLStephen Boyd1-7/+8
2021-12-09clk/ti/adpll: Make const pointer error a static const arrayColin Ian King1-1/+1
2021-12-08clk: lan966x: Extend lan966x clock driver for clock gating supportHoratiu Vultur1-3/+56
2021-12-08clk: gate: Add devm_clk_hw_register_gate()Horatiu Vultur1-0/+35
2021-12-08clk: lan966x: Add lan966x SoC clock driverKavyasree Kotagiri3-0/+248
2021-12-08clk: renesas: r9a07g044: Add GPU clock and reset entriesBiju Das1-0/+9
2021-12-08clk: renesas: r9a07g044: Add mux and divider for G clockBiju Das2-0/+10
2021-12-08clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macroBiju Das1-2/+2
2021-12-08clk: renesas: cpg-mssr: Add support for R-Car S4-8Yoshihiro Shimoda5-0/+196
2021-12-08clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driverYoshihiro Shimoda7-341/+437
2021-12-07clk: Don't parent clks until the parent is fully registeredMike Tipton1-3/+12
2021-12-07clk: versatile: clk-icst: use after free on error pathDan Carpenter1-1/+1
2021-12-06clk: qcom: sm6125-gcc: Swap ops of ice and apps on sdcc1Martin Botka1-2/+2
2021-12-06clk: qcom: rpmh: add support for SM8450 rpmh clocksVinod Koul1-0/+27
2021-12-06clk: qcom: smd-rpm: Drop binary value handling for buffered clockShawn Guo1-8/+0
2021-12-06clk: qcom: smd-rpm: Drop the use of struct rpm_ccShawn Guo1-17/+4
2021-12-06clk: qcom: smd-rpm: Drop MFD qcom-rpm referenceShawn Guo1-2/+0
2021-12-03clk: qcom: Add support for SDX65 RPMh clocksVamsi krishna Lanka1-0/+25
2021-12-02clk: imx: use module_platform_driverMiles Chen2-2/+2
2021-12-02clk: Gemini: fix struct name in kernel-docRandy Dunlap1-1/+1
2021-12-02clk: zynq: pll: Fix kernel-doc warningsShubhrajyoti Datta1-6/+6
2021-12-02clk: imx: pllv1: fix kernel-doc notation for struct clk_pllv1Randy Dunlap1-9/+8
2021-12-02clk: qcom: clk-alpha-pll: Don't reconfigure running TrionBjorn Andersson1-0/+9
2021-12-02clk: qcom: regmap-mux: fix parent clock lookupDmitry Baryshkov3-1/+15
2021-11-30clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBBMartin Blumenstingl1-3/+41
2021-11-26clk: renesas: r9a07g044: Add TSU clock and reset entryBiju Das1-0/+3
2021-11-23dt-bindings: clock: sunxi: Export CLK_DRAM for devfreqSamuel Holland2-4/+0
2021-11-23clk: sunxi-ng: Add support for the D1 SoC clocksSamuel Holland6-0/+1576
2021-11-23clk: sunxi-ng: gate: Add macros for gates with fixed dividersSamuel Holland1-1/+31
2021-11-23clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hwSamuel Holland1-0/+33
2021-11-23clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hwSamuel Holland1-0/+49
2021-11-23clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hwSamuel Holland1-0/+78
2021-11-23clk: sunxi-ng: Allow the CCU core to be built as a moduleSamuel Holland4-17/+24
2021-11-23clk: sunxi-ng: Convert early providers to platform driversSamuel Holland11-173/+333
2021-11-22clk: samsung: exynos850: Register clocks earlySam Protsenko1-21/+49
2021-11-22clk: imx8mp: Fix the parent clk of the audio_root_clkHui Wang1-1/+1
2021-11-22clk: imx8mn: Fix imx8mn_clko1_selsAdam Ford1-3/+3
2021-11-22clk: imx: Use div64_ul instead of do_divChangcheng Deng1-3/+3
2021-11-22clk: imx: imx8ulp: set suppress_bind_attrs to truePeng Fan1-0/+1
2021-11-22clk: samsung: exynos850: Keep some crucial clocks runningSam Protsenko1-6/+13