diff options
author | Mythri P K <mythripk@ti.com> | 2011-03-09 16:31:38 +0530 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-03-16 11:45:49 +0530 |
commit | 7ed024aa280cb38c8aa5c188d2d2c98f5daede10 (patch) | |
tree | f1ca3f2434bdb639414852efa5c92b196af77099 /drivers/video/omap2 | |
parent | b119601d4e226e42a067ff33116774d79dd9afbc (diff) |
OMAP4: DSS2: HDMI: Select between HDMI VENC clock source.
Adding function to select between HDMI or VENC clock source.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2')
-rw-r--r-- | drivers/video/omap2/dss/dss.c | 5 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dss.h | 6 |
2 files changed, 11 insertions, 0 deletions
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 562d8d28d4f2..f1628bd850d1 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -605,6 +605,11 @@ void dss_set_dac_pwrdn_bgz(bool enable) REG_FLD_MOD(DSS_CONTROL, enable, 5, 5); /* DAC Power-Down Control */ } +void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select hdmi) +{ + REG_FLD_MOD(DSS_CONTROL, hdmi, 15, 15); /* VENC_HDMI_SWITCH */ +} + static int dss_init(void) { int r; diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index 26a43c93e489..eb05d39ef17c 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -126,6 +126,11 @@ enum dss_clk_source { * OMAP4: DSS_FCLK */ }; +enum dss_hdmi_venc_clk_source_select { + DSS_VENC_TV_CLK = 0, + DSS_HDMI_M_PCLK = 1, +}; + struct dss_clock_info { /* rates that we get with dividers below */ unsigned long fck; @@ -214,6 +219,7 @@ void dss_recheck_connections(struct omap_dss_device *dssdev, bool force); int dss_init_platform_driver(void); void dss_uninit_platform_driver(void); +void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select); void dss_save_context(void); void dss_restore_context(void); void dss_clk_enable(enum dss_clock clks); |