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authorLucas Stach <l.stach@pengutronix.de>2021-10-02 02:59:42 +0200
committerShawn Guo <shawnguo@kernel.org>2021-10-06 20:13:42 +0800
commit656ade7aa42a2c6d08b3c5ddff074b54d025ccc2 (patch)
tree025a48e71fd44286f0241efee8b0d2ce73390dab /drivers/soc
parent18c98573a4cf2dc183cd884cec23869ba0c9fc1b (diff)
soc: imx: gpcv2: keep i.MX8M* bus clocks enabled
Annotate the domains with bus clocks to keep those clocks enabled as long as the domain is active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/soc')
-rw-r--r--drivers/soc/imx/gpcv2.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index e5a98107ad56..abf840609c56 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -527,6 +527,7 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = {
.hskack = IMX8M_VPU_HSK_PWRDNACKN,
},
.pgc = BIT(IMX8M_PGC_VPU),
+ .keep_clocks = true,
},
[IMX8M_POWER_DOMAIN_DISP] = {
@@ -625,6 +626,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.hskreq = IMX8MM_HSIO_HSK_PWRDNREQN,
.hskack = IMX8MM_HSIO_HSK_PWRDNACKN,
},
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_PCIE] = {
@@ -671,6 +673,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.hskack = IMX8MM_GPUMIX_HSK_PWRDNACKN,
},
.pgc = BIT(IMX8MM_PGC_GPUMIX),
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_GPU] = {
@@ -697,6 +700,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN,
},
.pgc = BIT(IMX8MM_PGC_VPUMIX),
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_VPUG1] = {
@@ -743,6 +747,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
.hskack = IMX8MM_DISPMIX_HSK_PWRDNACKN,
},
.pgc = BIT(IMX8MM_PGC_DISPMIX),
+ .keep_clocks = true,
},
[IMX8MM_POWER_DOMAIN_MIPI] = {
@@ -810,6 +815,7 @@ static const struct imx_pgc_domain imx8mn_pgc_domains[] = {
.hskreq = IMX8MN_HSIO_HSK_PWRDNREQN,
.hskack = IMX8MN_HSIO_HSK_PWRDNACKN,
},
+ .keep_clocks = true,
},
[IMX8MN_POWER_DOMAIN_OTG1] = {