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authorBen Skeggs <bskeggs@redhat.com>2012-07-20 08:17:34 +1000
committerBen Skeggs <bskeggs@redhat.com>2012-10-03 13:12:56 +1000
commitebb945a94bba2ce8dff7b0942ff2b3f2a52a0a69 (patch)
tree07cad59be501458e6ae1304b7c0352e322ac3387 /drivers/gpu/drm/nouveau/nv04_fence.c
parentac1499d9573f4aadd1d2beac11fe23af8ce90c24 (diff)
drm/nouveau: port all engines to new engine module format
This is a HUGE commit, but it's not nearly as bad as it looks - any problems can be isolated to a particular chipset and engine combination. It was simply too difficult to port each one at a time, the compat layers are *already* ridiculous. Most of the changes here are simply to the glue, the process for each of the engine modules was to start with a standard skeleton and copy+paste the old code into the appropriate places, fixing up variable names etc as needed. v2: Marcin Slusarz <marcin.slusarz@gmail.com> - fix find/replace bug in license header v3: Ben Skeggs <bskeggs@redhat.com> - bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and left no space for kernel's requirements during GEM pushbuf submission. - fix duplicate assignments noticed by clang v4: Marcin Slusarz <marcin.slusarz@gmail.com> - add sparse annotations to nv04_fifo_pause/nv04_fifo_start - use ioread32_native/iowrite32_native for fifo control registers v5: Ben Skeggs <bskeggs@redhat.com> - rebase on v3.6-rc4, modified to keep copy engine fix intact - nv10/fence: unmap fence bo before destroying - fixed fermi regression when using nvidia gr fuc - fixed typo in supported dma_mask checking Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_fence.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fence.c37
1 files changed, 11 insertions, 26 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_fence.c b/drivers/gpu/drm/nouveau/nv04_fence.c
index 1b45a4f8c0a5..a220b94ba9f2 100644
--- a/drivers/gpu/drm/nouveau/nv04_fence.c
+++ b/drivers/gpu/drm/nouveau/nv04_fence.c
@@ -22,15 +22,14 @@
* Authors: Ben Skeggs
*/
-#include "drmP.h"
-#include "nouveau_drv.h"
+#include <engine/fifo.h>
+
+#include "nouveau_drm.h"
#include "nouveau_dma.h"
-#include <core/ramht.h>
#include "nouveau_fence.h"
struct nv04_fence_chan {
struct nouveau_fence_chan base;
- atomic_t sequence;
};
struct nv04_fence_priv {
@@ -57,19 +56,11 @@ nv04_fence_sync(struct nouveau_fence *fence,
return -ENODEV;
}
-int
-nv04_fence_mthd(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
-{
- struct nv04_fence_chan *fctx = chan->fence;
- atomic_set(&fctx->sequence, data);
- return 0;
-}
-
static u32
nv04_fence_read(struct nouveau_channel *chan)
{
- struct nv04_fence_chan *fctx = chan->fence;
- return atomic_read(&fctx->sequence);
+ struct nouveau_fifo_chan *fifo = (void *)chan->object;
+ return atomic_read(&fifo->refcnt);
}
static void
@@ -87,7 +78,6 @@ nv04_fence_context_new(struct nouveau_channel *chan)
struct nv04_fence_chan *fctx = kzalloc(sizeof(*fctx), GFP_KERNEL);
if (fctx) {
nouveau_fence_context_new(&fctx->base);
- atomic_set(&fctx->sequence, 0);
chan->fence = fctx;
return 0;
}
@@ -95,23 +85,19 @@ nv04_fence_context_new(struct nouveau_channel *chan)
}
static void
-nv04_fence_destroy(struct drm_device *dev)
+nv04_fence_destroy(struct nouveau_drm *drm)
{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nv04_fence_priv *priv = dev_priv->fence.func;
-
- dev_priv->fence.func = NULL;
+ struct nv04_fence_priv *priv = drm->fence;
+ drm->fence = NULL;
kfree(priv);
}
int
-nv04_fence_create(struct drm_device *dev)
+nv04_fence_create(struct nouveau_drm *drm)
{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nv04_fence_priv *priv;
- int ret;
- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
@@ -121,6 +107,5 @@ nv04_fence_create(struct drm_device *dev)
priv->base.emit = nv04_fence_emit;
priv->base.sync = nv04_fence_sync;
priv->base.read = nv04_fence_read;
- dev_priv->fence.func = &priv->base;
- return ret;
+ return 0;
}