diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-01-20 20:22:03 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-02-08 18:07:10 +0200 |
| commit | 63ff30442519bb40307f940c5a89a95ca904723a (patch) | |
| tree | 581de2ff800246c14536cf1b259aa29b27b0bfb6 /drivers/gpu/drm/i915/intel_cdclk.c | |
| parent | 1a5301a58e5fca15598a1b3e79706b522d763574 (diff) | |
drm/i915: Nuke the VLV/CHV PFI programming power domain workaround
The hack to grab the pipe A power domain around VLV/CHV cdclk
programming has surely outlived its usefulness. We should be
holding sufficient power domains during any modeset, so let's
just nuke this hack.
v2: Fix typo in commit message (Ander)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170120182205.8141-13-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_cdclk.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_cdclk.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index 305c07820cae..1d4799124e39 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -1512,24 +1512,10 @@ static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state) { struct drm_i915_private *dev_priv = to_i915(old_state->dev); - /* - * FIXME: We can end up here with all power domains off, yet - * with a CDCLK frequency other than the minimum. To account - * for this take the PIPE-A power domain, which covers the HW - * blocks needed for the following programming. This can be - * removed once it's guaranteed that we get here either with - * the minimum CDCLK set, or the required power domains - * enabled. - */ - intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A); - if (IS_CHERRYVIEW(dev_priv)) chv_set_cdclk(dev_priv, &dev_priv->cdclk.actual); else vlv_set_cdclk(dev_priv, &dev_priv->cdclk.actual); - - - intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A); } static int bdw_modeset_calc_cdclk(struct drm_atomic_state *state) |