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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 09:23:24 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 09:23:24 -0700
commit9bc747bea5fad819e0c0ad96e6a67ea0640dfe2b (patch)
treed500225e7a1c90a6bd17d3e63e2f6e781810db2b /arch/arm/mach-at91/include
parent32b908eea9e5ecd1049008e134eadbfcd0da5e38 (diff)
parent0e896b1ddc1905df904df98c204bacf028219729 (diff)
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull first batch of arm-soc cleanups from Olof Johansson: "These cleanups are basically all over the place. The idea is to collect changes with minimal impact but large number of changes so we can avoid them from distracting in the diffstat in the other series. A significant number of lines get removed here, in particular because the ixp2000 and ixp23xx platforms get removed. These have never been extremely popular and have fallen into disuse over time with no active maintainer taking care of them. The u5500 soc never made it into a product, so we are removing it from the ux500 platform. Many good cleanups also went into the at91 and omap platforms, as has been the case for a number of releases." Trivial modify-delete conflicts in arch/arm/mach-{ixp2000,ixp23xx} * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (152 commits) ARM: clps711x: Cleanup IRQ handling ARM clps711x: Removed unused header mach/time.h ARM: clps711x: Added note about support EP731x CPU to Kconfig ARM: clps711x: Added missing register definitions ARM: clps711x: Used own subarch directory for store header file Dove: Fix Section mismatch warnings ARM: orion5x: ts78xx debugging changes ARM: orion5x: remove PM dependency from ts78xx ARM: orion5x: ts78xx fix NAND resource off by one ARM: orion5x: ts78xx whitespace cleanups Orion5x: Fix Section mismatch warnings Orion5x: Fix warning: struct pci_dev declared inside paramter list ARM: clps711x: Combine header files into one for clps711x-targets ARM: S3C24XX: Use common macro to define resources on mach-qt2410.c ARM: S3C24XX: Use common macro to define resources on mach-osiris.c ARM: EXYNOS: Adapt to cpuidle core time keeping and irq enable ARM: S5PV210: Use common macro to define resources on mach-smdkv210.c ARM: S5PV210: Use common macro to define resources on dev-audio.c ARM: S5PC100: Use common macro to define resources on dev-audio.c ARM: S5P64X0: Use common macro to define resources on dev-audio.c ...
Diffstat (limited to 'arch/arm/mach-at91/include')
-rw-r--r--arch/arm/mach-at91/include/mach/at91rm9200.h5
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h7
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h4
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h4
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h5
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h5
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9x5.h8
-rw-r--r--arch/arm/mach-at91/include/mach/board.h1
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h28
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h16
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h178
11 files changed, 164 insertions, 97 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 603e6aac2a4f..e67317c67761 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -88,11 +88,6 @@
#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
#define AT91RM9200_BASE_MC 0xffffff00 /* Memory Controllers */
-#define AT91_USART0 AT91RM9200_BASE_US0
-#define AT91_USART1 AT91RM9200_BASE_US1
-#define AT91_USART2 AT91RM9200_BASE_US2
-#define AT91_USART3 AT91RM9200_BASE_US3
-
/*
* Internal Memory.
*/
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 08ae9afd00fe..416c7b6c56d3 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -95,13 +95,6 @@
#define AT91SAM9260_BASE_WDT 0xfffffd40
#define AT91SAM9260_BASE_GPBR 0xfffffd50
-#define AT91_USART0 AT91SAM9260_BASE_US0
-#define AT91_USART1 AT91SAM9260_BASE_US1
-#define AT91_USART2 AT91SAM9260_BASE_US2
-#define AT91_USART3 AT91SAM9260_BASE_US3
-#define AT91_USART4 AT91SAM9260_BASE_US4
-#define AT91_USART5 AT91SAM9260_BASE_US5
-
/*
* Internal Memory.
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 44fbdc12ee62..a041406d06ee 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -79,10 +79,6 @@
#define AT91SAM9261_BASE_WDT 0xfffffd40
#define AT91SAM9261_BASE_GPBR 0xfffffd50
-#define AT91_USART0 AT91SAM9261_BASE_US0
-#define AT91_USART1 AT91SAM9261_BASE_US1
-#define AT91_USART2 AT91SAM9261_BASE_US2
-
/*
* Internal Memory.
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index d96cbb2e03c4..d201029d60b3 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -95,10 +95,6 @@
#define AT91SAM9263_BASE_RTT1 0xfffffd50
#define AT91SAM9263_BASE_GPBR 0xfffffd60
-#define AT91_USART0 AT91SAM9263_BASE_US0
-#define AT91_USART1 AT91SAM9263_BASE_US1
-#define AT91_USART2 AT91SAM9263_BASE_US2
-
#define AT91_SMC AT91_SMC0
/*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index d052abcff852..3a4da24d5911 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -106,11 +106,6 @@
#define AT91SAM9G45_BASE_RTC 0xfffffdb0
#define AT91SAM9G45_BASE_GPBR 0xfffffd60
-#define AT91_USART0 AT91SAM9G45_BASE_US0
-#define AT91_USART1 AT91SAM9G45_BASE_US1
-#define AT91_USART2 AT91SAM9G45_BASE_US2
-#define AT91_USART3 AT91SAM9G45_BASE_US3
-
/*
* Internal Memory.
*/
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index e0073eb10144..a15db56d33fa 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -89,11 +89,6 @@
#define AT91SAM9RL_BASE_GPBR 0xfffffd60
#define AT91SAM9RL_BASE_RTC 0xfffffe00
-#define AT91_USART0 AT91SAM9RL_BASE_US0
-#define AT91_USART1 AT91SAM9RL_BASE_US1
-#define AT91_USART2 AT91SAM9RL_BASE_US2
-#define AT91_USART3 AT91SAM9RL_BASE_US3
-
/*
* Internal Memory.
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index 88e43d534cdf..c75ee19b58d3 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -55,14 +55,6 @@
#define AT91SAM9X5_BASE_USART2 0xf8024000
/*
- * Base addresses for early serial code (uncompress.h)
- */
-#define AT91_DBGU AT91_BASE_DBGU0
-#define AT91_USART0 AT91SAM9X5_BASE_USART0
-#define AT91_USART1 AT91SAM9X5_BASE_USART1
-#define AT91_USART2 AT91SAM9X5_BASE_USART2
-
-/*
* Internal Memory.
*/
#define AT91SAM9X5_SRAM_BASE 0x00300000 /* Internal SRAM base address */
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 49a821192c65..369afc2ffc5b 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -121,7 +121,6 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de
#define ATMEL_UART_RI 0x20
extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins);
-extern void __init at91_set_serial_console(unsigned portnr);
extern struct platform_device *atmel_default_console_device;
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index 0118c3338552..73d2fd209ce4 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -54,6 +54,7 @@
#define ARCH_REVISON_9200_BGA (0 << 0)
#define ARCH_REVISON_9200_PQFP (1 << 0)
+#ifndef __ASSEMBLY__
enum at91_soc_type {
/* 920T */
AT91_SOC_RM9200,
@@ -106,7 +107,7 @@ static inline int at91_soc_is_detected(void)
return at91_soc_initdata.type != AT91_SOC_NONE;
}
-#ifdef CONFIG_ARCH_AT91RM9200
+#ifdef CONFIG_SOC_AT91RM9200
#define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
#define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
#define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
@@ -116,45 +117,37 @@ static inline int at91_soc_is_detected(void)
#define cpu_is_at91rm9200_pqfp() (0)
#endif
-#ifdef CONFIG_ARCH_AT91SAM9260
+#ifdef CONFIG_SOC_AT91SAM9260
#define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
#define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
+#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
#else
#define cpu_is_at91sam9xe() (0)
#define cpu_is_at91sam9260() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9G20
-#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
-#else
#define cpu_is_at91sam9g20() (0)
#endif
-#ifdef CONFIG_ARCH_AT91SAM9261
+#ifdef CONFIG_SOC_AT91SAM9261
#define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
-#else
-#define cpu_is_at91sam9261() (0)
-#endif
-
-#ifdef CONFIG_ARCH_AT91SAM9G10
#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
#else
+#define cpu_is_at91sam9261() (0)
#define cpu_is_at91sam9g10() (0)
#endif
-#ifdef CONFIG_ARCH_AT91SAM9263
+#ifdef CONFIG_SOC_AT91SAM9263
#define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
#else
#define cpu_is_at91sam9263() (0)
#endif
-#ifdef CONFIG_ARCH_AT91SAM9RL
+#ifdef CONFIG_SOC_AT91SAM9RL
#define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
#else
#define cpu_is_at91sam9rl() (0)
#endif
-#ifdef CONFIG_ARCH_AT91SAM9G45
+#ifdef CONFIG_SOC_AT91SAM9G45
#define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
#define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
#define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
@@ -168,7 +161,7 @@ static inline int at91_soc_is_detected(void)
#define cpu_is_at91sam9m11() (0)
#endif
-#ifdef CONFIG_ARCH_AT91SAM9X5
+#ifdef CONFIG_SOC_AT91SAM9X5
#define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
#define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
#define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
@@ -189,5 +182,6 @@ static inline int at91_soc_is_detected(void)
* definitions may reduce clutter in common drivers.
*/
#define cpu_is_at32ap7000() (0)
+#endif /* __ASSEMBLY__ */
#endif /* __MACH_CPU_H__ */
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 01db372be8e5..ef5786299c60 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -22,27 +22,17 @@
/* 9263, 9g45 */
#define AT91_BASE_DBGU1 0xffffee00
-#if defined(CONFIG_ARCH_AT91RM9200)
+#if defined(CONFIG_ARCH_AT91X40)
+#include <mach/at91x40.h>
+#else
#include <mach/at91rm9200.h>
-#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
#include <mach/at91sam9260.h>
-#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)
#include <mach/at91sam9261.h>
-#elif defined(CONFIG_ARCH_AT91SAM9263)
#include <mach/at91sam9263.h>
-#elif defined(CONFIG_ARCH_AT91SAM9RL)
#include <mach/at91sam9rl.h>
-#elif defined(CONFIG_ARCH_AT91SAM9G45)
#include <mach/at91sam9g45.h>
-#elif defined(CONFIG_ARCH_AT91SAM9X5)
#include <mach/at91sam9x5.h>
-#elif defined(CONFIG_ARCH_AT91X40)
-#include <mach/at91x40.h>
-#else
-#error "Unsupported AT91 processor"
-#endif
-#if !defined(CONFIG_ARCH_AT91X40)
/*
* On all at91 except rm9200 and x40 have the System Controller starts
* at address 0xffffc000 and has a size of 16KiB.
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 4218647c1fcd..6f6118d1576a 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -1,7 +1,8 @@
/*
* arch/arm/mach-at91/include/mach/uncompress.h
*
- * Copyright (C) 2003 SAN People
+ * Copyright (C) 2003 SAN People
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,22 +26,147 @@
#include <linux/atmel_serial.h>
#include <mach/hardware.h>
-#if defined(CONFIG_AT91_EARLY_DBGU0)
-#define UART_OFFSET AT91_BASE_DBGU0
-#elif defined(CONFIG_AT91_EARLY_DBGU1)
-#define UART_OFFSET AT91_BASE_DBGU1
-#elif defined(CONFIG_AT91_EARLY_USART0)
-#define UART_OFFSET AT91_USART0
-#elif defined(CONFIG_AT91_EARLY_USART1)
-#define UART_OFFSET AT91_USART1
-#elif defined(CONFIG_AT91_EARLY_USART2)
-#define UART_OFFSET AT91_USART2
-#elif defined(CONFIG_AT91_EARLY_USART3)
-#define UART_OFFSET AT91_USART3
-#elif defined(CONFIG_AT91_EARLY_USART4)
-#define UART_OFFSET AT91_USART4
-#elif defined(CONFIG_AT91_EARLY_USART5)
-#define UART_OFFSET AT91_USART5
+#include <mach/at91_dbgu.h>
+#include <mach/cpu.h>
+
+void __iomem *at91_uart;
+
+#if !defined(CONFIG_ARCH_AT91X40)
+static const u32 uarts_rm9200[] = {
+ AT91_BASE_DBGU0,
+ AT91RM9200_BASE_US0,
+ AT91RM9200_BASE_US1,
+ AT91RM9200_BASE_US2,
+ AT91RM9200_BASE_US3,
+ 0,
+};
+
+static const u32 uarts_sam9260[] = {
+ AT91_BASE_DBGU0,
+ AT91SAM9260_BASE_US0,
+ AT91SAM9260_BASE_US1,
+ AT91SAM9260_BASE_US2,
+ AT91SAM9260_BASE_US3,
+ AT91SAM9260_BASE_US4,
+ AT91SAM9260_BASE_US5,
+ 0,
+};
+
+static const u32 uarts_sam9261[] = {
+ AT91_BASE_DBGU0,
+ AT91SAM9261_BASE_US0,
+ AT91SAM9261_BASE_US1,
+ AT91SAM9261_BASE_US2,
+ 0,
+};
+
+static const u32 uarts_sam9263[] = {
+ AT91_BASE_DBGU1,
+ AT91SAM9263_BASE_US0,
+ AT91SAM9263_BASE_US1,
+ AT91SAM9263_BASE_US2,
+ 0,
+};
+
+static const u32 uarts_sam9g45[] = {
+ AT91_BASE_DBGU1,
+ AT91SAM9G45_BASE_US0,
+ AT91SAM9G45_BASE_US1,
+ AT91SAM9G45_BASE_US2,
+ AT91SAM9G45_BASE_US3,
+ 0,
+};
+
+static const u32 uarts_sam9rl[] = {
+ AT91_BASE_DBGU0,
+ AT91SAM9RL_BASE_US0,
+ AT91SAM9RL_BASE_US1,
+ AT91SAM9RL_BASE_US2,
+ AT91SAM9RL_BASE_US3,
+ 0,
+};
+
+static const u32 uarts_sam9x5[] = {
+ AT91_BASE_DBGU0,
+ AT91SAM9X5_BASE_USART0,
+ AT91SAM9X5_BASE_USART1,
+ AT91SAM9X5_BASE_USART2,
+ 0,
+};
+
+static inline const u32* decomp_soc_detect(u32 dbgu_base)
+{
+ u32 cidr, socid;
+
+ cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR);
+ socid = cidr & ~AT91_CIDR_VERSION;
+
+ switch (socid) {
+ case ARCH_ID_AT91RM9200:
+ return uarts_rm9200;
+
+ case ARCH_ID_AT91SAM9G20:
+ case ARCH_ID_AT91SAM9260:
+ return uarts_sam9260;
+
+ case ARCH_ID_AT91SAM9261:
+ return uarts_sam9261;
+
+ case ARCH_ID_AT91SAM9263:
+ return uarts_sam9263;
+
+ case ARCH_ID_AT91SAM9G45:
+ return uarts_sam9g45;
+
+ case ARCH_ID_AT91SAM9RL64:
+ return uarts_sam9rl;
+
+ case ARCH_ID_AT91SAM9X5:
+ return uarts_sam9x5;
+ }
+
+ /* at91sam9g10 */
+ if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
+ return uarts_sam9261;
+ }
+ /* at91sam9xe */
+ else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
+ return uarts_sam9260;
+ }
+
+ return NULL;
+}
+
+static inline void arch_decomp_setup(void)
+{
+ int i = 0;
+ const u32* usarts;
+
+ usarts = decomp_soc_detect(AT91_BASE_DBGU0);
+
+ if (!usarts)
+ usarts = decomp_soc_detect(AT91_BASE_DBGU1);
+ if (!usarts) {
+ at91_uart = NULL;
+ return;
+ }
+
+ do {
+ /* physical address */
+ at91_uart = (void __iomem *)usarts[i];
+
+ if (__raw_readl(at91_uart + ATMEL_US_BRGR))
+ return;
+ i++;
+ } while (usarts[i]);
+
+ at91_uart = NULL;
+}
+#else
+static inline void arch_decomp_setup(void)
+{
+ at91_uart = NULL;
+}
#endif
/*
@@ -52,28 +178,24 @@
*/
static void putc(int c)
{
-#ifdef UART_OFFSET
- void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
+ if (!at91_uart)
+ return;
- while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY))
+ while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXRDY))
barrier();
- __raw_writel(c, sys + ATMEL_US_THR);
-#endif
+ __raw_writel(c, at91_uart + ATMEL_US_THR);
}
static inline void flush(void)
{
-#ifdef UART_OFFSET
- void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
+ if (!at91_uart)
+ return;
/* wait for transmission to complete */
- while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
+ while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
barrier();
-#endif
}
-#define arch_decomp_setup()
-
#define arch_decomp_wdog()
#endif