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author | Alex Deucher <alexander.deucher@amd.com> | 2012-11-08 10:13:24 -0500 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2012-11-08 10:24:19 -0500 |
commit | f418b88aad0c42b4caf4d79a0cf8d14a5d0a2284 (patch) | |
tree | 1afe96ef35e1162037e2360ba497a960e118b06b | |
parent | 860fe2f05fa2eacac84368e23547ec8cf3cc6652 (diff) |
drm/radeon/si: add some missing regs to the VM reg checker
This register is needed for streamout to work properly.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/sid.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index b0db712060fb..4422d630b33b 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -2474,6 +2474,7 @@ static bool si_vm_reg_valid(u32 reg) /* check config regs */ switch (reg) { case GRBM_GFX_INDEX: + case CP_STRMOUT_CNTL: case VGT_VTX_VECT_EJECT_REG: case VGT_CACHE_INVALIDATION: case VGT_ESGS_RING_SIZE: diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 7d2a20e56577..a8871afc5b4e 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h @@ -424,6 +424,7 @@ # define RDERR_INT_ENABLE (1 << 0) # define GUI_IDLE_INT_ENABLE (1 << 19) +#define CP_STRMOUT_CNTL 0x84FC #define SCRATCH_REG0 0x8500 #define SCRATCH_REG1 0x8504 #define SCRATCH_REG2 0x8508 |