xtensa: don't use l32r opcode directly

xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

4 files changed, 24 insertions, 31 deletions

diff --git a/arch/xtensa/boot/boot-elf/bootstrap.S b/arch/xtensa/boot/boot-elf/bootstrap.S
index 29c68426ab56..99e98c9bae41 100644
--- a/arch/xtensa/boot/boot-elf/bootstrap.S
+++ b/arch/xtensa/boot/boot-elf/bootstrap.S
@@ -29,17 +29,7 @@ _ResetVector:
 	.begin  no-absolute-literals
 	.literal_position
 
-#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \
-	XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
-	.literal RomInitAddr, CONFIG_KERNEL_LOAD_ADDRESS
-#else
-	.literal RomInitAddr, KERNELOFFSET
-#endif
-#ifndef CONFIG_PARSE_BOOTPARAM
-	.literal RomBootParam, 0
-#else
-	.literal RomBootParam, _bootparam
-
+#ifdef CONFIG_PARSE_BOOTPARAM
 	.align 4
 _bootparam:
 	.short	BP_TAG_FIRST
@@ -66,13 +56,22 @@ _SetupMMU:
 	initialize_mmu
 #endif
 
-	.end    no-absolute-literals
-
 	rsil    a0, XCHAL_DEBUGLEVEL-1
 	rsync
 reset:
-	l32r    a0, RomInitAddr
-	l32r	a2, RomBootParam
+#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \
+	XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
+	movi	a0, CONFIG_KERNEL_LOAD_ADDRESS
+#else
+	movi	a0, KERNELOFFSET
+#endif
+#ifdef CONFIG_PARSE_BOOTPARAM
+	movi	a2, _bootparam
+#else
+	movi	a2, 0
+#endif
 	movi	a3, 0
 	movi	a4, 0
 	jx      a0
+
+	.end    no-absolute-literals
diff --git a/arch/xtensa/include/asm/futex.h b/arch/xtensa/include/asm/futex.h
index 5bfbc1c401d4..fd0eef6b8e7c 100644
--- a/arch/xtensa/include/asm/futex.h
+++ b/arch/xtensa/include/asm/futex.h
@@ -32,8 +32,8 @@
 	"3:\n"						\
 	"	.section .fixup,\"ax\"\n"		\
 	"	.align 4\n"				\
-	"4:	.long	3b\n"				\
-	"5:	l32r	%0, 4b\n"			\
+	"	.literal_position\n"			\
+	"5:	movi	%0, 3b\n"			\
 	"	movi	%1, %3\n"			\
 	"	jx	%0\n"				\
 	"	.previous\n"				\
@@ -108,8 +108,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 	"2:\n"
 	"	.section .fixup,\"ax\"\n"
 	"	.align 4\n"
-	"3:	.long	2b\n"
-	"4:	l32r	%1, 3b\n"
+	"	.literal_position\n"
+	"4:	movi	%1, 2b\n"
 	"	movi	%0, %7\n"
 	"	jx	%1\n"
 	"	.previous\n"
diff --git a/arch/xtensa/include/asm/uaccess.h b/arch/xtensa/include/asm/uaccess.h
index f1158b4c629c..d11ef2939652 100644
--- a/arch/xtensa/include/asm/uaccess.h
+++ b/arch/xtensa/include/asm/uaccess.h
@@ -159,10 +159,9 @@ __asm__ __volatile__(					\
 	"2:				\n"		\
 	"   .section  .fixup,\"ax\"	\n"		\
 	"   .align 4			\n"		\
-	"4:				\n"		\
-	"   .long  2b			\n"		\
+	"   .literal_position		\n"		\
 	"5:				\n"		\
-	"   l32r   %1, 4b		\n"		\
+	"   movi   %1, 2b		\n"		\
 	"   movi   %0, %4		\n"		\
 	"   jx     %1			\n"		\
 	"   .previous			\n"		\
@@ -217,10 +216,9 @@ __asm__ __volatile__(			\
 	"2:				\n"	\
 	"   .section  .fixup,\"ax\"	\n"	\
 	"   .align 4			\n"	\
-	"4:				\n"	\
-	"   .long  2b			\n"	\
+	"   .literal_position		\n"	\
 	"5:				\n"	\
-	"   l32r   %1, 4b		\n"	\
+	"   movi   %1, 2b		\n"	\
 	"   movi   %2, 0		\n"	\
 	"   movi   %0, %4		\n"	\
 	"   jx     %1			\n"	\
diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S
index 9053a5622d2c..da08e75100ab 100644
--- a/arch/xtensa/kernel/head.S
+++ b/arch/xtensa/kernel/head.S
@@ -59,10 +59,6 @@ ENTRY(_start)
 
 	.align	4
 	.literal_position
-.Lstartup:
-	.word	_startup
-
-	.align	4
 _SetupOCD:
 	/*
 	 * Initialize WB, WS, and clear PS.EXCM (to allow loop instructions).
@@ -99,12 +95,12 @@ _SetupMMU:
 1:
 #endif
 #endif
-	.end	no-absolute-literals
 
-	l32r	a0, .Lstartup
+	movi	a0, _startup
 	jx	a0
 
 ENDPROC(_start)
+	.end	no-absolute-literals
 
 	__REF
 	.literal_position