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author | Gowtham Tammana <g-tammana@ti.com> | 2021-09-21 09:18:07 +0200 |
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committer | Tony Lindgren <tony@atomide.com> | 2021-10-06 10:46:44 +0300 |
commit | 02794dbdc892a20479995cb9083a69a2ff213d96 (patch) | |
tree | f03b7ce42de769f28f045eba8450c3013a7590d8 | |
parent | 4b0ea64a27f543c563cef6ab16c07bbe26a5606f (diff) |
ARM: dts: dra7: add entry for bb2d module
BB2D is a Vivante GC 2D Accelerator.
This adds the node to the dts file within a target module node.
Crossbar index number is used for interrupt mapping.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index dfc1ef8ef6ae..6b485cbed8d5 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -965,6 +965,25 @@ }; }; + target-module@59000000 { + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x59000020 0x4>; + reg-names = "rev"; + clocks = <&dss_clkctrl DRA7_DSS_BB2D_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x59000000 0x1000>; + + bb2d: gpu@0 { + compatible = "vivante,gc"; + reg = <0x0 0x700>; + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&dss_clkctrl DRA7_BB2D_CLKCTRL 0>; + clock-names = "core"; + }; + }; + aes1_target: target-module@4b500000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x4b500080 0x4>, |