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2014-03-17tcg-sparc: Convert to new ldst opcodesRichard Henderson2-100/+53
2014-03-17tcg-sparc: Convert to new ldst helpersRichard Henderson1-59/+131
2014-03-17tcg-sparc: Tidy tcg_out_tlb_load interfaceRichard Henderson1-40/+30
2014-03-17tcg-sparc: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-51/+65
2014-03-17tcg-sparc: Improve tcg_out_moviRichard Henderson1-21/+31
2014-03-17tcg-sparc: Dont handle constant arguments to ext32 opsRichard Henderson1-12/+4
2014-03-17tcg-sparc: Don't handle remainderRichard Henderson2-23/+2
2014-03-17tcg-sparc: Use intptr_t as appropriateRichard Henderson1-11/+9
2014-03-17tcg-sparc: Tidy call+jump patternsRichard Henderson1-19/+19
2014-03-17tcg-sparc: Fix tlb readRichard Henderson1-21/+15
2014-03-17tcg-sparc: Fix ld64 for 32-bit modeRichard Henderson1-0/+1
2014-03-14tcg-aarch64: Introduce tcg_out_insn_3405Richard Henderson1-21/+27
2014-03-14tcg-aarch64: Support div, remRichard Henderson2-13/+45
2014-03-14tcg-aarch64: Support muluh, mulshRichard Henderson2-2/+14
2014-03-14tcg-aarch64: Support add2, sub2Richard Henderson2-4/+80
2014-03-14tcg-aarch64: Support depositRichard Henderson2-21/+49
2014-03-14tcg-aarch64: Use tcg_out_insn for setcondRichard Henderson1-9/+3
2014-03-14tcg-aarch64: Support movcondRichard Henderson2-2/+36
2014-03-14tcg-aarch64: Support andc, orc, eqv, not, negRichard Henderson2-10/+67
2014-03-14tcg-aarch64: Handle constant operands to and, or, xorRichard Henderson1-49/+107
2014-03-14tcg-aarch64: Handle constant operands to add, sub, and compareRichard Henderson1-22/+78
2014-03-14tcg-aarch64: Implement mov with tcg_out_insnRichard Henderson1-15/+9
2014-03-14tcg-aarch64: Introduce tcg_out_insn_3401Richard Henderson1-46/+26
2014-03-14tcg-aarch64: Convert shift insns to tcg_out_insnRichard Henderson1-31/+21
2014-03-14tcg-aarch64: Introduce tcg_out_insnRichard Henderson1-36/+58
2014-03-08tcg-aarch64: Remove nop from qemu_st slow pathRichard Henderson1-7/+0
2014-03-08tcg-aarch64: Simplify tcg_out_ldst_9 encodingRichard Henderson1-12/+2
2014-03-08tcg-aarch64: Use intptr_t apropriatelyRichard Henderson1-28/+21
2014-03-08tcg-aarch64: Remove the shift_imm parameter from tcg_out_cmpRichard Henderson1-6/+5
2014-03-08tcg-aarch64: Hoist common argument loads in tcg_out_opRichard Henderson1-45/+50
2014-03-08tcg-aarch64: Don't handle mov/movi in tcg_out_opRichard Henderson1-13/+7
2014-03-08tcg-aarch64: Set ext based on TCG_OPF_64BITRichard Henderson1-21/+7
2014-03-08tcg-aarch64: Change all ext variables to TCGTypeRichard Henderson1-27/+37
2014-03-08tcg-aarch64: Remove redundant CPU_TLB_ENTRY_BITS checkRichard Henderson1-6/+0
2014-03-02tcg: Fix typo in comment (dependancies -> dependencies)Stefan Weil1-1/+1
2014-02-21tcg/i386: Fix build for systems without working cpuid.h (MacOSX, Win32)Peter Maydell1-1/+3
2014-02-17tcg/i386: Use SHLX/SHRX/SARX instructionsRichard Henderson1-11/+50
2014-02-17tcg/i386: Use ANDN instructionRichard Henderson2-13/+45
2014-02-17tcg/i386: Add tcg_out_vex_modrmRichard Henderson1-3/+38
2014-02-17tcg/i386: Move TCG_CT_CONST_* to tcg-target.cRichard Henderson2-3/+4
2014-02-17tcg/optimize: Add more identity simplificationsRichard Henderson1-15/+24
2014-02-17tcg/optimize: Optmize ANDC X,Y,Y to MOV X,0Richard Henderson1-0/+1
2014-02-17tcg/optimize: Simply some logical ops to NOTRichard Henderson1-0/+57
2014-02-17tcg/optimize: Handle known-zeros masks for ANDCRichard Henderson1-0/+11
2014-02-17tcg/optimize: add known-zero bits compute for load opsAurelien Jarno1-1/+25
2014-02-17tcg/optimize: improve known-zero bits for 32-bit opsAurelien Jarno1-0/+6
2014-02-17tcg/optimize: fix known-zero bits optimizationAurelien Jarno1-1/+7
2014-02-17tcg/optimize: fix known-zero bits for right shift opsAurelien Jarno1-5/+14
2014-02-17tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1].Huw Davies1-1/+1
2014-02-15TCG: Fix 32-bit host allocation typoRichard Henderson1-1/+1
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