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AgeCommit message (Expand)AuthorFilesLines
2014-06-23tcg-ppc64: Move call macros out of tcg-target.hRichard Henderson2-6/+5
2014-06-23tcg-ppc64: Make TCG_AREG0 and TCG_REG_CALL_STACK enum constantsRichard Henderson1-35/+11
2014-06-23tcg-ppc64: Use tcg_out_{ld,st,cmp} internallyRichard Henderson1-19/+14
2014-06-23tcg-ppc64: Relax register restrictions in tcg_out_mem_longRichard Henderson1-5/+7
2014-06-23tcg-ppc64: Move functions aroundRichard Henderson1-361/+361
2014-06-23tcg-ppc64: Avoid some hard-codings of TCG_TYPE_I64Richard Henderson1-10/+13
2014-06-04tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson1-2/+0
2014-05-12tcg: Remove unreachable code in tcg_out_op and op_defsRichard Henderson1-28/+5
2014-05-12tcg-ppc64: Rename tcg_out_calli to tcg_out_callRichard Henderson1-21/+16
2014-05-12tcg-ppc64: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-84/+81
2014-04-28tcg: Add INDEX_op_trunc_shr_i32Richard Henderson1-0/+1
2014-04-18tcg: Use HOST_WORDS_BIGENDIANRichard Henderson1-1/+0
2014-04-18tcg-ppc64: Use the type parameter to tcg_target_const_matchRichard Henderson1-1/+9
2014-04-18tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson1-1/+1
2013-11-30tcg-ppc64: Use qemu_getauxvalRichard Henderson1-9/+2
2013-10-12tcg-ppc64: Support new ldst opcodesRichard Henderson2-62/+17
2013-10-12tcg-ppc64: Convert to le/be ldst helpersRichard Henderson1-16/+22
2013-10-12tcg-ppc64: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-39/+45
2013-10-10tcg: Add qemu_ld_st_i32/64Richard Henderson1-0/+2
2013-10-10tcg: Add tcg-be-ldst.hRichard Henderson1-23/+3
2013-09-25tcg-ppc64: Implement CONFIG_QEMU_LDST_OPTIMIZATIONRichard Henderson1-77/+135
2013-09-25tcg-ppc64: Add _noaddr functions for emitting forward branchesRichard Henderson1-10/+16
2013-09-25tcg-ppc64: Streamline tcg_out_tlb_readRichard Henderson1-97/+97
2013-09-25tcg-ppc64: Implement tcg_register_jitRichard Henderson1-23/+73
2013-09-25tcg-ppc64: Handle long offsets betterRichard Henderson1-73/+74
2013-09-25tcg-ppc64: Tidy register allocation orderRichard Henderson1-27/+22
2013-09-25tcg-ppc64: Look through a constant function descriptorRichard Henderson1-4/+19
2013-09-25tcg-ppc64: Fold constant call address into descriptor loadRichard Henderson1-3/+11
2013-09-25tcg-ppc64: Don't load the static chain from TCGRichard Henderson1-1/+0
2013-09-25tcg-ppc64: Avoid code for nop moveRichard Henderson1-1/+3
2013-09-25tcg-ppc64: Use tcg_out64Richard Henderson1-5/+1
2013-09-25tcg-ppc64: Use TCG_REG_Rn constantsRichard Henderson1-48/+48
2013-09-25tcg-ppc64: More use of TAI and SAI helper macrosRichard Henderson1-25/+16
2013-09-25tcg-ppc64: Reformat tcg-target.cRichard Henderson1-239/+239
2013-09-02exec: Split softmmu_defs.hRichard Henderson1-3/+0
2013-09-02tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson1-4/+4
2013-09-02tcg: Change relocation offsets to intptr_tRichard Henderson1-1/+1
2013-09-02tcg-ppc64: Implement muluh, mulshRichard Henderson2-29/+11
2013-09-02tcg: Add muluh and mulsh opcodesRichard Henderson1-0/+4
2013-07-09tcg-ppc64: Don't implement remRichard Henderson2-28/+2
2013-07-09tcg: Split rem requirement from div requirementRichard Henderson1-0/+2
2013-06-17tcg-ppc64: rotr_i32 rotates wrong amountAnton Blanchard1-1/+1
2013-06-17tcg-ppc64: Fix add2_i64Anton Blanchard1-7/+7
2013-06-17tcg-ppc64: bswap64 rotates output 32 bitsAnton Blanchard1-2/+0
2013-06-17tcg-ppc64: Fix RLDCL opcodeAnton Blanchard1-5/+6
2013-04-15tcg-ppc64: Handle deposit of zeroRichard Henderson1-6/+16
2013-04-15tcg-ppc64: Implement mulu2/muls2_i64Richard Henderson2-2/+29
2013-04-15tcg-ppc64: Implement add2/sub2_i64Richard Henderson2-2/+58
2013-04-15tcg-ppc64: Use getauxval for ISA detectionRichard Henderson1-0/+14
2013-04-15tcg-ppc64: Implement movcondRichard Henderson2-2/+61
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