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AgeCommit message (Expand)AuthorFilesLines
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini2-1/+2
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini1-14/+1
2014-06-05softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini2-1/+1
2014-06-05softmmu: make do_unaligned_access a method of CPUPaolo Bonzini3-6/+7
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson4-9/+4
2014-05-26target-xtensa: fix cross-page jumps/calls at the end of TBMax Filippov1-2/+2
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber1-4/+4
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber1-1/+3
2014-03-13cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber1-4/+6
2014-03-13cpu-exec: Change cpu_resume_from_signal() argument to CPUStateAndreas Färber1-1/+1
2014-03-13exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber1-3/+6
2014-03-13translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber1-2/+4
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber1-2/+2
2014-03-13exec: Change tlb_fill() argument to CPUStateAndreas Färber1-2/+4
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber1-2/+3
2014-03-13cpu: Move watchpoint fields from CPU_COMMON to CPUStateAndreas Färber2-4/+6
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2-10/+14
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2-7/+8
2014-03-13target-xtensa: Clean up ENV_GET_CPU() usageAndreas Färber2-2/+4
2014-02-24target-xtensa: provide HW confg ID registersMax Filippov4-3/+21
2014-02-24target-xtensa: refactor standard core configurationMax Filippov4-21/+13
2014-02-24target-xtensa: add basic checks to icache opcodesMax Filippov3-0/+33
2014-02-24target-xtensa: add basic checks to dcache opcodesMax Filippov1-0/+38
2014-02-24target-xtensa: add RRRI4 opcode format fieldsMax Filippov1-0/+9
2014-02-11exec: Make ldl_*_phys input an AddressSpaceEdgar E. Iglesias1-1/+2
2014-02-11exec: Make tb_invalidate_phys_addr input an ASEdgar E. Iglesias1-1/+2
2013-11-08target-xtensa: add missing DEBUG section to dc233c configMax Filippov1-0/+1
2013-10-15target-xtensa: add in_asm loggingMax Filippov1-0/+8
2013-10-10tcg: Move helper registration into tcg_context_initRichard Henderson1-2/+0
2013-09-02target: Include softmmu_exec.h where forgottenRichard Henderson1-0/+1
2013-09-02tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson1-1/+1
2013-08-22aio / timers: Switch entire codebase to the new timer APIAlex Bligh1-1/+1
2013-08-05Merge remote-tracking branch 'filippov/tags/20130729-xtensa' into stagingAnthony Liguori3-23/+53
2013-07-29target-xtensa: check register window inlineMax Filippov1-8/+25
2013-07-29target-xtensa: don't generate dead code to access invalid SRsMax Filippov1-13/+18
2013-07-29target-xtensa: avoid double-stopping at breakpointsMax Filippov3-2/+8
2013-07-29target-xtensa: add fallthrough markersMax Filippov1-0/+2
2013-07-29cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber1-0/+2
2013-07-27cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber4-2/+14
2013-07-27gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber1-6/+8
2013-07-27target-xtensa: Move cpu_gdb_{read,write}_register()Andreas Färber1-0/+100
2013-07-26cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber2-0/+11
2013-07-26target-xtensa: Introduce XtensaCPU subclassesAndreas Färber3-12/+47
2013-07-23exec: Change cpu_memory_rw_debug() argument to CPUStateAndreas Färber1-5/+5
2013-07-23cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber4-5/+10
2013-07-23cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber1-3/+4
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber1-5/+0
2013-07-23cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber1-0/+8
2013-07-09target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPUAndreas Färber1-4/+5
2013-07-09target-xtensa: gen_intermediate_code_internal() should be inlinedAndreas Färber1-2/+3
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