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2015-06-11target-mips: Misaligned memory accesses for MSAYongbok Kim3-78/+102
2015-06-11target-mips: Misaligned memory accesses for R6Yongbok Kim2-13/+28
2015-06-11target-mips: add Config5.FRE support allowing Status.FR=0 emulationLeon Alrae4-156/+208
2015-06-11target-mips: move group of functions above gen_load_fpr32()Leon Alrae1-60/+58
2015-06-02kvm: introduce kvm_arch_msi_data_to_gsiEric Auger1-0/+5
2015-04-30kvm: add support for memory transaction attributesPaolo Bonzini1-1/+3
2015-03-19Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-03-1...Peter Maydell1-1/+1
2015-03-19target-mips: Fix warning from SparseStefan Weil1-1/+1
2015-03-18target-mips: save cpu state before calling MSA load and store helpersLeon Alrae1-0/+2
2015-03-18target-mips: fix hflags modified in delay / forbidden slotLeon Alrae1-4/+15
2015-03-18target-mips: fix CP0.BadVAddr by stopping translation on Address ErrorLeon Alrae1-0/+1
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-47/+47
2015-03-12Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-1/+1
2015-03-11Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150311' into stagingPeter Maydell6-329/+288
2015-03-11kvm: add machine state to kvm_arch_initMarcel Apfelbaum1-1/+1
2015-03-11target-mips: add missing MSACSR and restore fp_status and hflagsLeon Alrae4-27/+46
2015-03-11target-mips: replace cpu_save/cpu_load with VMStateDescriptionLeon Alrae4-317/+257
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost1-8/+1
2015-02-13target-mips: pass 0 instead of -1 as rs in microMIPS LUI instructionLeon Alrae1-1/+1
2015-02-13target-mips: fix broken snapshottingLeon Alrae1-2/+4
2015-02-13target-mips: use CP0EnLo_XI instead of magic numberLeon Alrae1-2/+2
2015-02-13target-mips: ll and lld cause AdEL exception for unaligned addressLeon Alrae1-3/+7
2015-02-13target-mips: fix detection of the end of the page during translationLeon Alrae1-1/+4
2015-02-13target-mips: Make CP0.Status.CU1 read-only for the 5Kc and 5KEc processorsMaciej W. Rozycki1-2/+2
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-5/+3
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson1-1/+1
2015-02-10target-mips: Clean up switch fall through after commit fecd264Markus Armbruster1-0/+4
2015-02-06softfloat: expand out STATUS_VARPeter Maydell1-28/+28
2015-02-06softfloat: Expand out the STATUS_PARAM macroPeter Maydell1-8/+10
2015-01-20target-mips: Don't use _raw load/store accessorsPeter Maydell1-2/+2
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell1-1/+0
2015-01-12kvm: extend kvm_irqchip_add_msi_route to work on s390Frank Blaschka1-0/+6
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini1-1/+1
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini1-10/+14
2014-12-17Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141216' into stagingPeter Maydell8-382/+616
2014-12-16qemu-log: add log category for MMU infoAntony Pavlov1-2/+4
2014-12-16target-mips: remove excp_names[] from linux-user as it is unusedLeon Alrae1-1/+1
2014-12-16target-mips: convert single case switch into if statementLeon Alrae1-3/+1
2014-12-16target-mips: Fix DisasContext's ulri member initializationMaciej W. Rozycki1-1/+1
2014-12-16target-mips: Use local float status pointer across MSA macrosMaciej W. Rozycki1-35/+34
2014-12-16target-mips: Add missing calls to synchronise SoftFloat statusMaciej W. Rozycki4-17/+17
2014-12-16target-mips: Also apply the CP0.Status mask to MTTC0Maciej W. Rozycki1-1/+2
2014-12-16target-mips: gdbstub: Clean up FPU register handlingMaciej W. Rozycki1-19/+19
2014-12-16target-mips: Correct 32-bit address space wrappingMaciej W. Rozycki2-8/+19
2014-12-16target-mips: Tighten ISA level checksMaciej W. Rozycki3-15/+114
2014-12-16target-mips: Fix CP0.Config3.ISAOnExc write accessesMaciej W. Rozycki3-2/+15
2014-12-16target-mips: Output CP0.Config2-5 in the register dumpMaciej W. Rozycki1-0/+4
2014-12-16target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEPMaciej W. Rozycki1-3/+3
2014-12-16target-mips: Correct the writes to Status and Cause registers via gdbstubMaciej W. Rozycki3-86/+102
2014-12-16target-mips: Correct the handling of writes to CP0.Status for MIPSr6Maciej W. Rozycki1-2/+4
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