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AgeCommit message (Expand)AuthorFilesLines
2014-01-12arm: fix compile on bigendian hostAlexey Kardashevskiy1-1/+1
2014-01-08target-arm: A64: Add support for FCVT between half, single and doublePeter Maydell3-1/+96
2014-01-08target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructionsPeter Maydell3-1/+191
2014-01-08target-arm: A64: Add floating-point<->integer conversion instructionsWill Newton1-3/+20
2014-01-08target-arm: A64: Add floating-point<->fixed-point instructionsAlexander Graf3-1/+200
2014-01-08target-arm: A64: Add extra VFP fixed point conversion helpersWill Newton2-1/+26
2014-01-08target-arm: Ignore most exceptions from scalbn when doing fixpoint conversionPeter Maydell1-0/+9
2014-01-08target-arm: Rename A32 VFP conversion helpersWill Newton3-24/+35
2014-01-08target-arm: Prepare VFP_CONV_FIX helpers for A64 usesWill Newton1-14/+14
2014-01-08target-arm: fix build with gcc 4.8.2Michael S. Tsirkin1-0/+6
2014-01-08target-arm: remove raw_read|write duplicationPeter Crosthwaite1-10/+2
2014-01-08target-arm: use c13_context field for CONTEXTIDRSergey Fedorov1-1/+1
2014-01-08target-arm: Give the FPSCR rounding modes namesAlexander Graf2-4/+13
2014-01-08target-arm: A64: Add support for floating point cond selectClaudio Fontana1-1/+44
2014-01-08target-arm: A64: Add support for floating point conditional compareClaudio Fontana1-1/+34
2014-01-08target-arm: A64: Add support for floating point compareClaudio Fontana3-1/+113
2014-01-08target-arm: A64: Add fmov (scalar, immediate) instructionAlexander Graf1-1/+31
2014-01-08target-arm: A64: Add "Floating-point data-processing (3 source)" insnsAlexander Graf1-1/+94
2014-01-08target-arm: A64: Add "Floating-point data-processing (2 source)" insnsAlexander Graf1-1/+181
2014-01-08target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell4-52/+20
2014-01-08target-arm: A64: Fix vector register access on bigendian hostsPeter Maydell1-34/+35
2014-01-08target-arm: A64: Add support for dumping AArch64 VFP register stateAlexander Graf1-0/+16
2014-01-08target-arm: A64: support for ld/st/cl exclusiveMichael Matz1-3/+153
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell3-36/+49
2014-01-08target-arm: aarch64: add support for ld litAlexander Graf1-2/+45
2014-01-08target-arm: A64: add support for conditional compare insnsClaudio Fontana1-13/+60
2014-01-08target-arm: A64: add support for add/sub with carryClaudio Fontana1-2/+103
2014-01-07target-arm: Widen thread-local register state fields to 64 bitsPeter Maydell2-10/+30
2014-01-07target-arm: A64: Implement minimal set of EL0-visible sysregsPeter Maydell3-1/+115
2014-01-07target-arm: A64: Implement MRS/MSR/SYS/SYSLPeter Maydell1-30/+82
2014-01-07target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell5-12/+17
2014-01-04target-arm: Update generic cpreg code for AArch64Peter Maydell3-9/+211
2014-01-04target-arm: Pull "add one cpreg to hashtable" into its own functionPeter Maydell1-42/+52
2013-12-23target-arm: A64: implement FMOVPeter Maydell1-1/+85
2013-12-23target-arm: A64: Add decoder skeleton for FP instructionsPeter Maydell1-1/+169
2013-12-23target-arm: A64: implement SVC, BRKAlexander Graf1-2/+49
2013-12-23target-arm: A64: add support for 3 src data proc insnsAlexander Graf1-2/+95
2013-12-23target-arm: A64: add support for move wide instructionsAlex Bennée1-2/+49
2013-12-23target-arm: A64: add support for add, addi, sub, subiAlex Bennée1-6/+286
2013-12-23target-arm: A64: add support for ld/st with indexAlex Bennée1-1/+124
2013-12-23target-arm: A64: add support for ld/st with reg offsetAlex Bennée1-1/+143
2013-12-23target-arm: A64: add support for ld/st unsigned immAlex Bennée1-1/+88
2013-12-23target-arm: A64: add support for ld/st pairPeter Maydell1-2/+277
2013-12-17target-arm: A64: add support for logical (immediate) insnsAlexander Graf1-2/+173
2013-12-17target-arm: A64: add support for 1-src CLS insnClaudio Fontana3-1/+31
2013-12-17target-arm: A64: add support for bitfield insnsClaudio Fontana1-2/+54
2013-12-17target-arm: A64: add support for 1-src REV insnsClaudio Fontana1-1/+72
2013-12-17target-arm: A64: add support for 1-src RBIT insnAlexander Graf3-0/+39
2013-12-17target-arm: A64: add support for 1-src data processing and CLZClaudio Fontana3-2/+56
2013-12-17target-arm: A64: add support for 2-src shift reg insnsAlexander Graf1-0/+22
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