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authorMichael S. Tsirkin <mst@redhat.com>2014-06-24 07:44:30 +0300
committerMichael S. Tsirkin <mst@redhat.com>2014-06-29 18:59:06 +0300
commit29923e94e7ed93bac3fcc5e8a31b2f163a412172 (patch)
tree043d898f6af3d41d4bd9dfa5083651e0547eb3e3 /target-openrisc/translate.c
parentd75e2f68890bfea22cb2ea5b2de4657cab87a1da (diff)
openrisc: fix comment
Fix English in comment: s/the each/each/ s/ \*\// \*\// Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Diffstat (limited to 'target-openrisc/translate.c')
-rw-r--r--target-openrisc/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index b728718b64..55ff935d5e 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -531,14 +531,14 @@ static void dec_calc(DisasContext *dc, uint32_t insn)
TCGv_i64 high = tcg_temp_new_i64();
TCGv_i32 sr_ove = tcg_temp_local_new_i32();
int lab = gen_new_label();
- /* Calculate the each result. */
+ /* Calculate each result. */
tcg_gen_extu_i32_i64(tra, cpu_R[ra]);
tcg_gen_extu_i32_i64(trb, cpu_R[rb]);
tcg_gen_mul_i64(result, tra, trb);
tcg_temp_free_i64(tra);
tcg_temp_free_i64(trb);
tcg_gen_shri_i64(high, result, TARGET_LONG_BITS);
- /* Overflow or not. */
+ /* Overflow or not. */
tcg_gen_brcondi_i64(TCG_COND_EQ, high, 0x00000000, lab);
tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY));
tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE);