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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-16 22:44:25 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-16 22:44:25 +0000 |
commit | 1ef4ef4e640cae84d9706a1fbb8f3916a4bc08ab (patch) | |
tree | cb87f5b2bc0a7bd3af90b4de1daec4f2be5fa10c | |
parent | 6ba8dcd773e01dc3f61b3e788a8b6f12fb8ed4de (diff) |
target-alpha: small optimizations
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5238 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | target-alpha/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 4143076dda..5826d555c0 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -516,7 +516,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) goto invalid_opc; case 0x08: /* LDA */ - if (ra != 31) { + if (likely(ra != 31)) { if (rb != 31) tcg_gen_addi_i64(cpu_ir[ra], cpu_ir[rb], disp16); else @@ -525,7 +525,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) break; case 0x09: /* LDAH */ - if (ra != 31) { + if (likely(ra != 31)) { if (rb != 31) tcg_gen_addi_i64(cpu_ir[ra], cpu_ir[rb], disp16 << 16); else |