diff options
Diffstat (limited to 'src/rdc_vgatool.c')
| -rw-r--r-- | src/rdc_vgatool.c | 51 |
1 files changed, 24 insertions, 27 deletions
diff --git a/src/rdc_vgatool.c b/src/rdc_vgatool.c index 0d84bad..6ed94d8 100644 --- a/src/rdc_vgatool.c +++ b/src/rdc_vgatool.c @@ -18,6 +18,7 @@ * <jason.lin@rdc.com.tw> */ + #ifdef HAVE_CONFIG_H #include <config.h> #endif @@ -42,20 +43,20 @@ #include "xf86PciInfo.h" #include "xf86Pci.h" -/* framebuffer offscreen manager */ + #include "xf86fbman.h" -/* include xaa includes */ + #include "xaa.h" #include "xaarop.h" -/* H/W cursor support */ + #include "xf86Cursor.h" -/* Driver specific headers */ + #include "rdc.h" -/* Prototype type declaration*/ + void vRDCOpenKey(ScrnInfoPtr pScrn); Bool bRDCRegInit(ScrnInfoPtr pScrn); ULONG GetVRAMInfo(ScrnInfoPtr pScrn); @@ -79,7 +80,7 @@ bRDCRegInit(ScrnInfoPtr pScrn) { RDCRecPtr pRDC = RDCPTR(pScrn); - /* Enable MMIO */ + SetIndexRegMask(CRTC_PORT,0xA1, 0xFF, 0x04); return (TRUE); @@ -133,15 +134,11 @@ RDCFilterModeByBandWidth(ScrnInfoPtr pScrn, DisplayModePtr mode) void vSetStartAddressCRT1(RDCRecPtr pRDC, ULONG base) { - /* base is byte aligned, flipping base address is quad-word aligned */ ULONG uc1stFlippingCmdReg; - /* clear [27:3] base address of flipping control */ - uc1stFlippingCmdReg = *(ULONG *)MMIOREG_1ST_FLIP & (~MASK_1ST_FLIP_BASE); - - /* combine base with uc1stFlippingCmdReg */ - uc1stFlippingCmdReg |= (base & MASK_1ST_FLIP_BASE); - + + + uc1stFlippingCmdReg = (base & MASK_1ST_FLIP_BASE) | CMD_ENABLE_1STFLIP; *(ULONG *)MMIOREG_1ST_FLIP = uc1stFlippingCmdReg; } @@ -161,17 +158,17 @@ RDCGetMemBandWidth(ScrnInfoPtr pScrn) switch(DEVICE_ID(pRDC->PciInfo)) { case PCI_CHIP_M2010_A0: - /* Bus width is 16bit, and DRAM utilization is 30% */ + ulDRAMBusWidth = 16; DRAMEfficiency = 300; break; case PCI_CHIP_M2011: - /* Bus width is 32bit, and DRAM utilization is 60% */ + ulDRAMBusWidth = 32; DRAMEfficiency = 600; break; default: - /* Bus width is 16bit, and DRAM utilization is 60% */ + ulDRAMBusWidth = 16; DRAMEfficiency = 600; } @@ -182,8 +179,8 @@ RDCGetMemBandWidth(ScrnInfoPtr pScrn) vRDCOpenKey(pScrn); - CBiosExtension.pCBiosArguments->reg.x.AX = 0x4F14; - CBiosExtension.pCBiosArguments->reg.x.BX = 0x0000; + CBiosExtension.pCBiosArguments->reg.x.AX = OEMFunction; + CBiosExtension.pCBiosArguments->reg.x.BX = QueryBiosInfo; CInt10(&CBiosExtension); if ((CBiosExtension.pCBiosArguments->reg.lh.CL & (0x07)) == 0x03) @@ -195,9 +192,9 @@ RDCGetMemBandWidth(ScrnInfoPtr pScrn) ulMCLK = 200; } - /* Get Bandwidth */ - /* Use DDRII DRAM, so multiply 2 */ - /* Translate DRAM Bandwidth to byte, so div 8*/ + + + ulDRAMBandwidth = ulMCLK * ulDRAMBusWidth * 2 / 8; ActualDRAMBandwidth = ulDRAMBandwidth * DRAMEfficiency / 1000; @@ -274,8 +271,8 @@ vRDCLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors, VGA_LOAD_PALETTE_INDEX (DACIndex, DACR, DACG, DACB); } - } /* end of switch */ -} /* end of vRDCLoadPalette */ + } +} void RDCDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags) @@ -291,25 +288,25 @@ RDCDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int fla switch (PowerManagementMode) { case DPMSModeOn: - /* Screen: On; HSync: On, VSync: On */ + SEQ01 = 0x00; CRB6 = 0x00; break; case DPMSModeStandby: - /* Screen: Off; HSync: Off, VSync: On */ + SEQ01 = 0x20; CRB6 = 0x01; break; case DPMSModeSuspend: - /* Screen: Off; HSync: On, VSync: Off */ + SEQ01 = 0x20; CRB6 = 0x02; break; case DPMSModeOff: - /* Screen: Off; HSync: Off, VSync: Off */ + SEQ01 = 0x20; CRB6 = 0x03; break; |