diff options
| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-09-12 16:27:41 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-09-13 11:37:32 +0200 |
| commit | f5d02f48e431ca00621cc4a62de8d915c49ad5ec (patch) | |
| tree | 5534453b6656574942ed3381a3b3cd0bd413d81c | |
| parent | e8cf9e5aeb1d37a85608b537bfd90fe06897c749 (diff) | |
gallium/radeon/winsyses: reduce the number of pb_cache bucketsbuffer-suballoc
Small buffers are now handled via the slabs code, so separate buckets in
pb_cache have become redundant.
| -rw-r--r-- | src/gallium/auxiliary/pipebuffer/pb_cache.h | 2 | ||||
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 6 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 6 |
3 files changed, 5 insertions, 9 deletions
diff --git a/src/gallium/auxiliary/pipebuffer/pb_cache.h b/src/gallium/auxiliary/pipebuffer/pb_cache.h index aa83cc8b38..7000fcd1c5 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_cache.h +++ b/src/gallium/auxiliary/pipebuffer/pb_cache.h @@ -50,7 +50,7 @@ struct pb_cache /* The cache is divided into buckets for minimizing cache misses. * The driver controls which buffer goes into which bucket. */ - struct list_head buckets[8]; + struct list_head buckets[4]; pipe_mutex mutex; uint64_t cache_size; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 6a61b30cfd..ea8478fea2 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -741,12 +741,10 @@ no_slab: /* Determine the pb_cache bucket for minimizing pb_cache misses. */ pb_cache_bucket = 0; - if (size <= 4096) /* small buffers */ - pb_cache_bucket += 1; if (domain & RADEON_DOMAIN_VRAM) /* VRAM or VRAM+GTT */ - pb_cache_bucket += 2; + pb_cache_bucket += 1; if (flags == RADEON_FLAG_GTT_WC) /* WC */ - pb_cache_bucket += 4; + pb_cache_bucket += 2; assert(pb_cache_bucket < ARRAY_SIZE(ws->bo_cache.buckets)); /* Get a buffer from the cache. */ diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index 2e7635e863..e6460efb42 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -1014,12 +1014,10 @@ no_slab: /* Determine the pb_cache bucket for minimizing pb_cache misses. */ pb_cache_bucket = 0; - if (size <= 4096) /* small buffers */ - pb_cache_bucket += 1; if (domain & RADEON_DOMAIN_VRAM) /* VRAM or VRAM+GTT */ - pb_cache_bucket += 2; + pb_cache_bucket += 1; if (flags == RADEON_FLAG_GTT_WC) /* WC */ - pb_cache_bucket += 4; + pb_cache_bucket += 2; assert(pb_cache_bucket < ARRAY_SIZE(ws->bo_cache.buckets)); bo = radeon_bo(pb_cache_reclaim_buffer(&ws->bo_cache, size, alignment, |