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2015-03-10[AArch64] Avoid going through GPRs for across-vector instructions.Ahmed Bougacha5-5/+450
2015-03-10[AsmPrinter][TLOF] Reintroduce AArch64 testBruno Cardoso Lopes1-0/+92
2015-03-10Change the generation of the vmuluwm instruction to be based on the MUL opcode.Kit Barton2-5/+6
2015-03-10[LoopAccesses 3/3] Print the dependences with -analyzeAdam Nemet2-66/+4
2015-03-10Teach lowering to correctly handle invoke statepoint and gc results tied to t...Igor Laevsky1-0/+38
2015-03-10[X86, AVX] replace vinsertf128 intrinsics with generic shufflesSanjay Patel4-107/+47
2015-03-10Fix a memory corruption in Dependency Analysis.Karthik Bhat1-0/+103
2015-03-10Fix a crash in Dependency Analysis.Karthik Bhat1-0/+51
2015-03-10Fix a crash in InstCombine where we could try to truncate a switch comparison...Owen Anderson1-0/+7
2015-03-10Fix a stack overflow in the assembler when checking that GEPs must be over si...Owen Anderson1-0/+9
2015-03-10Fix an issue in the verifier where we could try to read information out of a ...Owen Anderson1-0/+20
2015-03-10Fix an infinite loop in InstCombine when an instruction with no users and sid...Owen Anderson1-0/+14
2015-03-10Use a better name for compile unit labels.Rafael Espindola5-7/+7
2015-03-10Added ConstantExpr support to CFLAA.George Burgess IV3-5/+41
2015-03-10Added special handling for inttoptr in CFLAA.George Burgess IV1-0/+73
2015-03-10[sanitizer] fix instrumentation with -mllvm -sanitizer-coverage-block-thresho...Kostya Serebryany1-0/+5
2015-03-10DwarfAccelTable: Fix handling of hash collisions.Frederic Riss1-0/+92
2015-03-09[Hexagon] Removing unused patterns.Colin LeMahieu1-3/+2
2015-03-09LLParser: gep: Simplify parsing error handlingDavid Blaikie1-1/+1
2015-03-09[CodeGen] Replace the reused stores' chain for extractelt expansion.Ahmed Bougacha2-122/+185
2015-03-09[X86] Add nounwind to vector-idiv.ll testcases. NFC.Ahmed Bougacha1-13/+15
2015-03-09Reland r229944: EH: Prune unreachable resume instructions during Dwarf EH pre...Reid Kleckner5-6/+118
2015-03-09Use a MapVector instead of an extra sort.Rafael Espindola1-9/+9
2015-03-09[Hexagon] Reapply r231699. Remove assumption that second operand is an immed...Colin LeMahieu1-1/+2
2015-03-09[SCEV] Unify getUnsignedRange and getSignedRangeSanjoy Das1-0/+39
2015-03-09[SCEV] Add a `scalar-evolution-print-constant-ranges' optionSanjoy Das8-20/+20
2015-03-09[Hexagon] Reverting r231699Colin LeMahieu1-2/+1
2015-03-09[Hexagon] Updating constant set to simpler versions.Colin LeMahieu1-1/+2
2015-03-09Don't prime the section map.Rafael Espindola1-1/+4
2015-03-09[Hexagon] Eliminating immediate condition set.Colin LeMahieu3-0/+3
2015-03-09InstrProf: Use the proftext format for these coverage testsJustin Bogner6-3/+24
2015-03-09InstrProf: Allow hexadecimal function hashes in proftext formatJustin Bogner1-2/+10
2015-03-09Print jump tables before exception tables.Rafael Espindola1-3/+5
2015-03-09Add logical ops to Mips fast-iselReed Kotler1-0/+605
2015-03-09R600/SI: Limit SGPRs to 80 on Tonga and IcelandMarek Olsak1-3/+6
2015-03-09Fix line ending in test CodeGen/X86/pr22774.ll. NFC.Andrea Di Biagio1-4/+1
2015-03-09Revert r231630 - Run LICM pass after loop unrolling pass.Kevin Qin1-43/+0
2015-03-09Fix a bug in the LLParser where we failed to diagnose landingpads with non-co...Owen Anderson1-0/+7
2015-03-09[AArch64] Enable partial & runtime unrolling on cortex-a57Kevin Qin3-0/+112
2015-03-09Introduce runtime unrolling disable matadata and use it to mark the scalar lo...Kevin Qin3-2/+37
2015-03-09Run LICM pass after loop unrolling pass.Kevin Qin1-0/+43
2015-03-09InstCombine: fix fold "fcmp x, undef" to account for NaNMehdi Amini1-0/+35
2015-03-08Teach DataLayout to infer a plausible alignment for things even when nothing ...Owen Anderson1-0/+10
2015-03-08[X86][AVX] Fix wrong lowering of VPERM2X128 nodesAndrea Di Biagio2-8/+77
2015-03-07ExecutionEngine: Preliminary support for dynamically loadable coff objectsDavid Majnemer1-0/+31
2015-03-07[DAGCombiner] Fix wrong folding of AND dag nodes.Andrea Di Biagio1-0/+15
2015-03-07[DAGCombiner] SCALAR_TO_VECTOR(EXTRACT_VECTOR_ELT(V,C)) -> VECTOR_SHUFFLESimon Pilgrim2-7/+4
2015-03-07Remove use of misched-bench from this test and replace it withEric Christopher1-1/+1
2015-03-07[dsymutil] Apply relocations to DIE data before cloning.Frederic Riss2-2/+18
2015-03-07Recommit r231324 with a fix to the ARM execution domain codeEric Christopher1-0/+4
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