~nh/llvm - Misc LLVM things, mostly radeonsi (AMDGPU)

Age	Commit message (Expand)	Author	Files	Lines
2015-03-11	Remove useMachineScheduler and replace it with subtarget options	Eric Christopher	1	-16/+4
2014-09-02	Change MCSchedModel to be a struct of statically initialized data.	Pete Cooper	1	-1/+1
2014-08-21	Rename AtomicExpandLoadLinked into AtomicExpand	Robin Morisset	1	-1/+1
2014-07-15	Move Post RA Scheduling flag bit into SchedMachineModel	Sanjay Patel	1	-10/+1
2014-07-02	[RegAllocGreedy] Provide a subtarget hook to disable the local reassignment	Quentin Colombet	1	-0/+5
2014-06-19	Add a new subtarget hook for whether or not we'd like to enable	Eric Christopher	1	-0/+4
2014-06-04	Add a subtarget hook: enablePostMachineScheduler.	Andrew Trick	1	-0/+4
2014-05-06	Update an embarassing out-of-date comment.	Andrew Trick	1	-5/+6
2014-01-07	Re-sort all of the includes with ./utils/sort_includes.py so that	Chandler Carruth	1	-1/+1
2013-09-26	Added temp flag -misched-bench for staging in default changes.	Andrew Trick	1	-1/+16
2013-08-29	Add useAA() to TargetSubtargetInfo	Hal Finkel	1	-0/+4
2012-11-13	misched: Allow subtargets to enable misched and dependent options.	Andrew Trick	1	-0/+4
2011-07-01	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	Evan Cheng	1	-0/+33