diff options
author | Dan Gohman <dan433584@gmail.com> | 2015-11-17 16:01:28 +0000 |
---|---|---|
committer | Dan Gohman <dan433584@gmail.com> | 2015-11-17 16:01:28 +0000 |
commit | 7673d242f73b19a7f5f011c9a1679f46ddf8de2a (patch) | |
tree | 10b353df040480984e95b056ef990ccda1c8f720 | |
parent | 08e6ab9d252aa0140800f45672bb2c8c57fb3ade (diff) |
Use TargetRegisterInfo for printing MachineOperand register comments
Several places in AsmPrinter.cpp print comments describing MachineOperand
registers using MCRegisterInfo, which uses MCOperand-oriented names. This
doesn't work for targets that use virtual registers exclusively, as
WebAssembly does, since virtual registers are represented and printed
differently.
This patch preserves what seems to be the spirit of r229978, avoiding the
use of TM.getSubtargetImpl(), while still using MachineOperand-oriented
printing for MachineOperands.
Differential Revision: http://reviews.llvm.org/D14709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253338 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 22 | ||||
-rw-r--r-- | test/CodeGen/AMDGPU/llvm.dbg.value.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/ARM/debug-info-arg.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/ARM/debug-info-blocks.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/ARM/debug-info-branch-folding.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/BPF/sockex2.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/Mips/llvm-ir/call.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/X86/2010-05-28-Crash.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll | 2 |
9 files changed, 25 insertions, 17 deletions
diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index f1e4cb813df..fabae38950f 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -724,19 +724,27 @@ static void emitComments(const MachineInstr &MI, raw_ostream &CommentOS) { /// that is an implicit def. void AsmPrinter::emitImplicitDef(const MachineInstr *MI) const { unsigned RegNo = MI->getOperand(0).getReg(); - OutStreamer->AddComment(Twine("implicit-def: ") + - MMI->getContext().getRegisterInfo()->getName(RegNo)); + + SmallString<128> Str; + raw_svector_ostream OS(Str); + OS << "implicit-def: " + << PrintReg(RegNo, MF->getSubtarget().getRegisterInfo()); + + OutStreamer->AddComment(OS.str()); OutStreamer->AddBlankLine(); } static void emitKill(const MachineInstr *MI, AsmPrinter &AP) { - std::string Str = "kill:"; + std::string Str; + raw_string_ostream OS(Str); + OS << "kill:"; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &Op = MI->getOperand(i); assert(Op.isReg() && "KILL instruction must have only register operands"); - Str += ' '; - Str += AP.MMI->getContext().getRegisterInfo()->getName(Op.getReg()); - Str += (Op.isDef() ? "<def>" : "<kill>"); + OS << ' ' + << PrintReg(Op.getReg(), + AP.MF->getSubtarget().getRegisterInfo()) + << (Op.isDef() ? "<def>" : "<kill>"); } AP.OutStreamer->AddComment(Str); AP.OutStreamer->AddBlankLine(); @@ -811,7 +819,7 @@ static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) { } if (Deref) OS << '['; - OS << AP.MMI->getContext().getRegisterInfo()->getName(Reg); + OS << PrintReg(Reg, AP.MF->getSubtarget().getRegisterInfo()); } if (Deref) diff --git a/test/CodeGen/AMDGPU/llvm.dbg.value.ll b/test/CodeGen/AMDGPU/llvm.dbg.value.ll index a54c48b25f8..c5aba2b76b8 100644 --- a/test/CodeGen/AMDGPU/llvm.dbg.value.ll +++ b/test/CodeGen/AMDGPU/llvm.dbg.value.ll @@ -2,7 +2,7 @@ ; CHECK-LABEL: {{^}}test_debug_value: ; CHECK: s_load_dwordx2 -; CHECK: DEBUG_VALUE: test_debug_value:globalptr_arg <- SGPR0_SGPR1 +; CHECK: DEBUG_VALUE: test_debug_value:globalptr_arg <- %SGPR0_SGPR1 ; CHECK: buffer_store_dword ; CHECK: s_endpgm define void @test_debug_value(i32 addrspace(1)* nocapture %globalptr_arg) #0 !dbg !4 { diff --git a/test/CodeGen/ARM/debug-info-arg.ll b/test/CodeGen/ARM/debug-info-arg.ll index 02bd585b354..bf7e7321ae3 100644 --- a/test/CodeGen/ARM/debug-info-arg.ll +++ b/test/CodeGen/ARM/debug-info-arg.ll @@ -11,7 +11,7 @@ define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, i64 0, metadata !13, metadata !DIExpression()), !dbg !21 tail call void @llvm.dbg.value(metadata i64 %x, i64 0, metadata !14, metadata !DIExpression()), !dbg !22 tail call void @llvm.dbg.value(metadata i64 %y, i64 0, metadata !17, metadata !DIExpression()), !dbg !23 -;CHECK: @DEBUG_VALUE: foo:y <- [R7+8] +;CHECK: @DEBUG_VALUE: foo:y <- [%R7+8] tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, i64 0, metadata !18, metadata !DIExpression()), !dbg !24 tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, i64 0, metadata !19, metadata !DIExpression()), !dbg !25 %1 = icmp eq %struct.tag_s* %c, null, !dbg !26 diff --git a/test/CodeGen/ARM/debug-info-blocks.ll b/test/CodeGen/ARM/debug-info-blocks.ll index 2e68b04dc5c..2a8898651f0 100644 --- a/test/CodeGen/ARM/debug-info-blocks.ll +++ b/test/CodeGen/ARM/debug-info-blocks.ll @@ -1,5 +1,5 @@ ; RUN: llc -O0 < %s | FileCheck %s -; CHECK: @DEBUG_VALUE: foobar_func_block_invoke_0:mydata <- [SP+{{[0-9]+}}] +; CHECK: @DEBUG_VALUE: foobar_func_block_invoke_0:mydata <- [%SP+{{[0-9]+}}] ; Radar 9331779 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target triple = "thumbv7-apple-ios" diff --git a/test/CodeGen/ARM/debug-info-branch-folding.ll b/test/CodeGen/ARM/debug-info-branch-folding.ll index ca4d8a3dabb..b9d110e42cd 100644 --- a/test/CodeGen/ARM/debug-info-branch-folding.ll +++ b/test/CodeGen/ARM/debug-info-branch-folding.ll @@ -6,8 +6,8 @@ target triple = "thumbv7-apple-macosx10.6.7" ;CHECK-NEXT: Ltmp1 ;CHECK-NEXT: LBB0_1 -;CHECK:@DEBUG_VALUE: x <- Q4{{$}} -;CHECK-NEXT:@DEBUG_VALUE: y <- Q4{{$}} +;CHECK:@DEBUG_VALUE: x <- %Q4{{$}} +;CHECK-NEXT:@DEBUG_VALUE: y <- %Q4{{$}} @.str = external constant [13 x i8] diff --git a/test/CodeGen/BPF/sockex2.ll b/test/CodeGen/BPF/sockex2.ll index 2e571ef6f46..b3e83eadf53 100644 --- a/test/CodeGen/BPF/sockex2.ll +++ b/test/CodeGen/BPF/sockex2.ll @@ -311,7 +311,7 @@ flow_dissector.exit.thread: ; preds = %86, %12, %196, %199 ; CHECK-LABEL: bpf_prog2: ; CHECK: ldabs_h r0, r6.data + 12 # encoding: [0x28,0x00,0x00,0x00,0x0c,0x00,0x00,0x00] ; CHECK: ldabs_h r0, r6.data + 16 # encoding: [0x28,0x00,0x00,0x00,0x10,0x00,0x00,0x00] -; CHECK: implicit-def: R1 +; CHECK: implicit-def: %R1 ; CHECK: ld_64 r1 ; CHECK-NOT: ori ; CHECK: call 1 # encoding: [0x85,0x00,0x00,0x00,0x01,0x00,0x00,0x00] diff --git a/test/CodeGen/Mips/llvm-ir/call.ll b/test/CodeGen/Mips/llvm-ir/call.ll index 6c4f08daee9..22a44da0b06 100644 --- a/test/CodeGen/Mips/llvm-ir/call.ll +++ b/test/CodeGen/Mips/llvm-ir/call.ll @@ -176,8 +176,8 @@ declare hidden void @undef_double(i32 %this, double %volume) unnamed_addr align define hidden void @thunk_undef_double(i32 %this, double %volume) unnamed_addr align 2 { ; ALL-LABEL: thunk_undef_double: -; O32: # implicit-def: A2 -; O32: # implicit-def: A3 +; O32: # implicit-def: %A2 +; O32: # implicit-def: %A3 ; ALL: jr $25 tail call void @undef_double(i32 undef, double undef) #8 ret void diff --git a/test/CodeGen/X86/2010-05-28-Crash.ll b/test/CodeGen/X86/2010-05-28-Crash.ll index 80118331be0..678f1befad1 100644 --- a/test/CodeGen/X86/2010-05-28-Crash.ll +++ b/test/CodeGen/X86/2010-05-28-Crash.ll @@ -46,7 +46,7 @@ entry: !18 = !DIFile(filename: "f.c", directory: "/tmp") !19 = !{} -;CHECK: DEBUG_VALUE: bar:x <- E +;CHECK: DEBUG_VALUE: bar:x <- %E ;CHECK: Ltmp ;CHECK: DEBUG_VALUE: foo:y <- 1{{$}} !20 = !{i32 1, !"Debug Info Version", i32 3} diff --git a/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll b/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll index 71e16a90c9d..1be800cdfcf 100644 --- a/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll +++ b/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll @@ -8,7 +8,7 @@ target triple = "x86_64-apple-darwin10.2" @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.foo*, i32)* @_ZN3foo3bazEi to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] define i32 @_ZN3foo3bazEi(%struct.foo* nocapture %this, i32 %x) nounwind readnone optsize noinline ssp align 2 !dbg !8 { -;CHECK: DEBUG_VALUE: baz:this <- RDI{{$}} +;CHECK: DEBUG_VALUE: baz:this <- %RDI{{$}} entry: tail call void @llvm.dbg.value(metadata %struct.foo* %this, i64 0, metadata !15, metadata !DIExpression()), !dbg !DILocation(scope: !8) tail call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !16, metadata !DIExpression()), !dbg !DILocation(scope: !8) |