diff options
| -rw-r--r-- | arch/sh/Makefile | 2 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh5/entry.S | 22 | ||||
| -rw-r--r-- | arch/sh/kernel/head_64.S | 8 | ||||
| -rw-r--r-- | arch/sh/kernel/vmlinux_64.lds.S | 4 | ||||
| -rw-r--r-- | arch/sh/mm/Kconfig | 3 |
5 files changed, 20 insertions, 19 deletions
diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 15161f1851a5..e08d4d27d8d6 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -85,7 +85,7 @@ KBUILD_IMAGE := arch/sh/boot/zImage ifdef CONFIG_SUPERH32 LDFLAGS_vmlinux += -e _stext else -LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_CACHED_MEMORY_OFFSET) \ +LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \ --defsym phys_stext_shmedia=phys_stext+1 \ -e phys_stext_shmedia endif diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S index 81010b9308b2..0f65bb4372da 100644 --- a/arch/sh/kernel/cpu/sh5/entry.S +++ b/arch/sh/kernel/cpu/sh5/entry.S @@ -432,7 +432,7 @@ reset_or_panic: synco /* TAKum03020 (but probably a good idea anyway.) */ putcon SP, DCR /* First save r0-1 and tr0, as we need to use these */ - movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP + movi resvec_save_area-CONFIG_PAGE_OFFSET, SP st.q SP, 0, r0 st.q SP, 8, r1 gettr tr0, r0 @@ -442,7 +442,7 @@ reset_or_panic: getcon EXPEVT, r0 movi RESET_CAUSE, r1 sub r1, r0, r1 /* r1=0 if reset */ - movi _stext-CONFIG_CACHED_MEMORY_OFFSET, r0 + movi _stext-CONFIG_PAGE_OFFSET, r0 ori r0, 1, r0 ptabs r0, tr0 beqi r1, 0, tr0 /* Jump to start address if reset */ @@ -454,7 +454,7 @@ reset_or_panic: beqi r1, 0, tr0 /* jump if single step */ /* Now jump to where we save the registers. */ - movi panic_stash_regs-CONFIG_CACHED_MEMORY_OFFSET, r1 + movi panic_stash_regs-CONFIG_PAGE_OFFSET, r1 ptabs r1, tr0 blink tr0, r63 @@ -490,7 +490,7 @@ debug_exception: */ putcon SP, DCR /* Save SSR & SPC, together with R0 & R1, as we need to use 2 regs. */ - movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP + movi resvec_save_area-CONFIG_PAGE_OFFSET, SP /* With the MMU off, we are bypassing the cache, so purge any * data that will be made stale by the following stores. @@ -558,7 +558,7 @@ debug_interrupt: /* Save original stack pointer into KCR1 */ synco putcon SP, KCR1 - movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP + movi resvec_save_area-CONFIG_PAGE_OFFSET, SP ocbp SP, 0 ocbp SP, 32 synco @@ -607,7 +607,7 @@ debug_interrupt: movi EVENT_FAULT_NOT_TLB, r4 or SP, ZERO, r5 - movi CONFIG_CACHED_MEMORY_OFFSET, r6 + movi CONFIG_PAGE_OFFSET, r6 add r6, r5, r5 getcon KCR1, SP @@ -1366,7 +1366,7 @@ route_to_panic_handler: last-chance debugging, e.g. if no output wants to go to the console. */ - movi panic_handler - CONFIG_CACHED_MEMORY_OFFSET, r1 + movi panic_handler - CONFIG_PAGE_OFFSET, r1 ptabs r1, tr0 pta 1f, tr1 gettr tr1, r0 @@ -1408,7 +1408,7 @@ peek_real_address_q: andc r1, r36, r1 /* turn sr.mmu off in real mode section */ putcon r1, ssr - movi .peek0 - CONFIG_CACHED_MEMORY_OFFSET, r36 /* real mode target address */ + movi .peek0 - CONFIG_PAGE_OFFSET, r36 /* real mode target address */ movi 1f, r37 /* virtual mode return addr */ putcon r36, spc @@ -1457,7 +1457,7 @@ poke_real_address_q: andc r1, r36, r1 /* turn sr.mmu off in real mode section */ putcon r1, ssr - movi .poke0-CONFIG_CACHED_MEMORY_OFFSET, r36 /* real mode target address */ + movi .poke0-CONFIG_PAGE_OFFSET, r36 /* real mode target address */ movi 1f, r37 /* virtual mode return addr */ putcon r36, spc @@ -1954,7 +1954,7 @@ panic_stash_regs: getcon SSR,r3 getcon EXPEVT,r4 /* Prepare to jump to C - physical address */ - movi panic_handler-CONFIG_CACHED_MEMORY_OFFSET, r1 + movi panic_handler-CONFIG_PAGE_OFFSET, r1 ori r1, 1, r1 ptabs r1, tr0 getcon DCR, SP @@ -2055,7 +2055,7 @@ trap_init: andi r19, -4, r19 /* reset MMUOFF + reserved */ /* For RESVEC exceptions we force the MMU off, which means we need the physical address. */ - movi LRESVEC_block-CONFIG_CACHED_MEMORY_OFFSET, r20 + movi LRESVEC_block-CONFIG_PAGE_OFFSET, r20 andi r20, -4, r20 /* reset reserved */ ori r20, 1, r20 /* set MMUOFF */ putcon r19, VBR diff --git a/arch/sh/kernel/head_64.S b/arch/sh/kernel/head_64.S index 55ae281893f8..c969db592bef 100644 --- a/arch/sh/kernel/head_64.S +++ b/arch/sh/kernel/head_64.S @@ -38,9 +38,9 @@ #define MMUDR_END DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP #define MMUDR_STEP TLB_STEP -/* Safety check : CONFIG_CACHED_MEMORY_OFFSET has to be a multiple of 512Mb */ -#if (CONFIG_CACHED_MEMORY_OFFSET & ((1UL<<29)-1)) -#error "CONFIG_CACHED_MEMORY_OFFSET must be a multiple of 512Mb" +/* Safety check : CONFIG_PAGE_OFFSET has to be a multiple of 512Mb */ +#if (CONFIG_PAGE_OFFSET & ((1UL<<29)-1)) +#error "CONFIG_PAGE_OFFSET must be a multiple of 512Mb" #endif /* @@ -49,7 +49,7 @@ /* Deal safely with the case where the base of RAM is not 512Mb aligned */ #define ALIGN_512M_MASK (0xffffffffe0000000) -#define ALIGNED_EFFECTIVE ((CONFIG_CACHED_MEMORY_OFFSET + CONFIG_MEMORY_START) & ALIGN_512M_MASK) +#define ALIGNED_EFFECTIVE ((CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START) & ALIGN_512M_MASK) #define ALIGNED_PHYSICAL (CONFIG_MEMORY_START & ALIGN_512M_MASK) #define MMUIR_TEXT_H (0x0000000000000003 | ALIGNED_EFFECTIVE) diff --git a/arch/sh/kernel/vmlinux_64.lds.S b/arch/sh/kernel/vmlinux_64.lds.S index f0f5771657dd..2fd0f7401484 100644 --- a/arch/sh/kernel/vmlinux_64.lds.S +++ b/arch/sh/kernel/vmlinux_64.lds.S @@ -24,7 +24,7 @@ #include <asm/cache.h> #include <asm/thread_info.h> -#define LOAD_OFFSET CONFIG_CACHED_MEMORY_OFFSET +#define LOAD_OFFSET CONFIG_PAGE_OFFSET #include <asm-generic/vmlinux.lds.h> OUTPUT_ARCH(sh:sh5) @@ -34,7 +34,7 @@ OUTPUT_ARCH(sh:sh5) ENTRY(__start) SECTIONS { - . = CONFIG_CACHED_MEMORY_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE; + . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE; _text = .; /* Text and read-only data */ .empty_zero_page : C_PHYS(.empty_zero_page) { diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 7ff26c1f4e9c..2af950784e66 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -17,7 +17,8 @@ config MMU config PAGE_OFFSET hex - default "0x80000000" if MMU + default "0x80000000" if MMU && SUPERH32 + default "0x20000000" if MMU && SUPERH64 default "0x00000000" config MEMORY_START |