summaryrefslogtreecommitdiff
path: root/src/intel
AgeCommit message (Expand)AuthorFilesLines
2018-08-06anv: add more swapchain formatsTapani Pälli1-5/+11
2018-08-04intel: tools: simplify meson buildLionel Landwerlin1-46/+50
2018-08-04intel: aubinator: simplify decodingLionel Landwerlin1-10/+5
2018-08-04intel: common: add missing stdint includeLionel Landwerlin1-0/+2
2018-08-04intel: decoder: remove unused variableLionel Landwerlin1-2/+0
2018-08-04intel: tools: aubwrite: reuse canonical address helperLionel Landwerlin1-17/+2
2018-08-04intel: aubinator: fix read the context/ringLionel Landwerlin1-2/+2
2018-08-03anv/pipeline: Disable FS dispatch for pointless fragment shadersJason Ekstrand1-4/+33
2018-08-02intel/tools: add error2aub creation into autotoolsAndres Gomez1-1/+23
2018-08-02anv/pipeline: Do cross-stage linking optimizationsJason Ekstrand1-0/+11
2018-08-02anv/pipeline: Pull most of the anv_pipeline_compile_* into common codeJason Ekstrand1-215/+92
2018-08-02anv/pipeline: Add a separate "link" stageJason Ekstrand1-128/+193
2018-08-02anv/pipeline: Compile to NIR in compile_graphicsJason Ekstrand1-161/+116
2018-08-02anv/pipeline: Recompile all shaders if any are missing from the cacheJason Ekstrand1-4/+37
2018-08-02anv/pipeline: Drop anv_pipeline_add_compiled_stageJason Ekstrand2-19/+10
2018-08-02anv/pipeline: Pull shader compilation out into a helper.Jason Ekstrand1-108/+120
2018-08-02anv/pipeline: Call anv_pipeline_compile_* in a loopJason Ekstrand1-26/+30
2018-08-02anv/pipeline: Hash the entire pipeline in one goJason Ekstrand1-53/+94
2018-08-02anv/pipeline: Populate keys up-frontJason Ekstrand1-55/+60
2018-08-02anv/pipline: Add a helper struct for per-stage infoJason Ekstrand2-95/+74
2018-08-01intel/compiler: Add brw_get_compiler_config_value for disk cacheJordan Justen3-1/+41
2018-08-01i965: Disable shader cache with INTEL_DEBUG=shader_timeJordan Justen1-2/+5
2018-08-01anv/pipeline: Add populate_tcs/tes_key helpersJason Ekstrand1-3/+25
2018-08-01anv/pipeline: Rework the parameters to populate_wm_prog_keyJason Ekstrand1-22/+24
2018-08-01anv/pipeline: More aggressively optimize away color attachmentsJason Ekstrand2-5/+14
2018-08-01anv: Restrict the number of color regions to those actually writtenJason Ekstrand1-0/+5
2018-08-01anv/pipeline: Fix up deref modes if we delete a FS outputJason Ekstrand1-0/+5
2018-08-01intel/nir: Call nir_lower_io_to_scalar_earlyJason Ekstrand1-5/+12
2018-08-01intel/nir: Split IO arrays into elementsJason Ekstrand1-0/+4
2018-08-01i965/fs: Flag all slots of a flat input as flatJason Ekstrand1-6/+9
2018-08-01intel/nir: Use the correct scalar stage for consumers when linkingJason Ekstrand1-1/+1
2018-08-01intel: tools: aubwrite: split gen[89] from gen10+Lionel Landwerlin5-186/+416
2018-08-01python: Explicitly use byte stringsMathieu Bridon1-2/+2
2018-08-01python: Open file in binary modeMathieu Bridon1-1/+1
2018-08-01python: Better get character ordinalsMathieu Bridon1-2/+2
2018-08-01intel/compiler: implement 8-bit constant loadIago Toral Quiroga1-0/+5
2018-08-01intel/compiler: add setup_imm_(u)b helpersIago Toral Quiroga2-0/+22
2018-07-27i965/icl: Disable binding table prefetchingTopi Pohjolainen1-0/+7
2018-07-27intel/compiler: fix lower conversions to account for predicationIago Toral Quiroga1-1/+4
2018-07-26i965: Combine both gl_PatchVerticesIn lowering passes.Kenneth Graunke2-4/+2
2018-07-26intel/compiler: Delete dead VS intrinsic handling.Kenneth Graunke1-12/+4
2018-07-26anv: drop unused local varsEric Engestrom1-6/+0
2018-07-26anv: remove incorrect `UNUSED` flagEric Engestrom1-1/+1
2018-07-25intel: Make the decoder just store addresses for bases, not buffers.Kenneth Graunke2-12/+12
2018-07-25intel: Make the decoder handle STATE_BASE_ADDRESS not being a buffer.Kenneth Graunke2-38/+46
2018-07-25anv: don't crash on vkDestroyDevice(NULL)Eric Engestrom1-1/+3
2018-07-25anv: fix python whitespace warningEric Engestrom1-1/+1
2018-07-25anv: cleanup python importsEric Engestrom2-3/+3
2018-07-25anv: remove unnecessary semicolons in pythonEric Engestrom1-3/+3
2018-07-25intel: tools: dump: only store device id on successLionel Landwerlin1-2/+2