diff options
| author | Chad Versace <chad.versace@intel.com> | 2015-09-24 11:57:10 -0700 |
|---|---|---|
| committer | Chad Versace <chad.versace@intel.com> | 2015-09-30 15:49:06 -0700 |
| commit | 8ca2cd7c17c000f835c61325971480e2a51f1c67 (patch) | |
| tree | 24d4a33805f4a4366ec1c4190a6838b385f52edc | |
| parent | 06d7b75bd0f789a9d84ba7f072c5d5e5c37a6710 (diff) | |
wip! i965/gen9: Enable non-msrt fast color clearskl-fast-clear-v06.01
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clear.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 17a745d0373..f3c99bddb06 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -241,7 +241,7 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) } /* Clear color buffers with fast clear or at least rep16 writes. */ - if (brw->gen >= 6 && brw->gen < 9 && (mask & BUFFER_BITS_COLOR)) { + if (brw->gen >= 6 && brw->gen <= 9 && (mask & BUFFER_BITS_COLOR)) { if (brw_meta_fast_clear(brw, fb, mask, partial_clear)) { debug_mask("blorp color", mask & BUFFER_BITS_COLOR); mask &= ~BUFFER_BITS_COLOR; |