~miku/mesa - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-04-29	intel/fs,vec4: Pull stall logic for memory fences up into the IR	Caio Marcelo de Oliveira Filho	1	-46/+7
2020-04-21	replace _mesa_logbase2 with util_logbase2	Dylan Baker	1	-2/+2
2020-04-20	intel/fs,vec4: Properly account SENDs in IVB memory fence	Caio Marcelo de Oliveira Filho	1	-1/+7
2020-01-24	intel/fs: Don't unnecessarily fall back to indirect sends on Gen12	Jason Ekstrand	1	-3/+4
2020-01-22	intel/compiler: Move Gen4/5 rounding to visitor	Matt Turner	1	-30/+2
2019-11-18	intel/compiler: Don't change hstride if not needed	Iván Briano	1	-5/+6
2019-10-21	intel/compiler: Set bits according to source file	Sagar Ghuge	1	-2/+12
2019-10-21	intel/compiler: Add Immediate support for 3 source instruction	Sagar Ghuge	1	-21/+32
2019-10-11	intel/eu: Don't set notify descriptor field of gateway barrier message.	Francisco Jerez	1	-1/+0
2019-10-11	intel/eu/gen12: Set SWSB annotations in hand-crafted assembly.	Francisco Jerez	1	-5/+52
2019-10-11	intel/eu/gen12: Add tracking of default SWSB state to the current brw_codegen...	Francisco Jerez	1	-0/+2
2019-10-11	intel/fs/gen12: Add codegen support for the SYNC instruction.	Francisco Jerez	1	-3/+5
2019-10-11	intel/eu/gen12: Don't set thread control, it's gone.	Francisco Jerez	1	-2/+4
2019-10-11	intel/eu/gen12: Don't set DD control, it's gone.	Francisco Jerez	1	-2/+4
2019-10-11	intel/eu/gen12: Use SEND instruction for split sends.	Francisco Jerez	1	-1/+1
2019-10-11	intel/eu/gen12: Codegen SEND descriptor regions correctly.	Francisco Jerez	1	-3/+8
2019-10-11	intel/eu/gen12: Codegen pathological SEND source and destination regions.	Francisco Jerez	1	-7/+39
2019-10-11	intel/eu/gen12: Codegen control flow instructions correctly.	Francisco Jerez	1	-6/+9
2019-10-11	intel/eu/gen12: Codegen three-source instruction source and destination regions.	Francisco Jerez	1	-24/+41
2019-10-11	intel/eu/gen12: Fix codegen of immediate source regions.	Francisco Jerez	1	-1/+1
2019-10-11	intel/eu: Encode and decode native instruction opcodes from/to IR opcodes.	Francisco Jerez	1	-0/+5
2019-10-11	intel/eu: Split brw_inst ex_desc accessors for SEND(C) vs. SENDS(C).	Francisco Jerez	1	-1/+1
2019-09-17	i965/fs/generator: refactor rounding mode helper in preparation for float con...	Samuel Iglesias Gonsálvez	1	-31/+21
2019-08-27	intel/compiler: Handle bits 15:12 in brw_send_indirect_split_message()	Kenneth Graunke	1	-2/+12
2019-08-27	intel/compiler: Fix src0/desc setter ordering	Kenneth Graunke	1	-2/+2
2019-07-11	intel/fs: Add support for SLM fence in Gen11	Caio Marcelo de Oliveira Filho	1	-4/+9
2019-07-01	intel/compiler: Enable the emission of ROR/ROL instructions	Sagar Ghuge	1	-0/+2
2019-06-03	intel/compiler: Fix assertions in brw_alu3	Sagar Ghuge	1	-3/+3
2019-05-30	intel/fs: Do a stalling MFENCE in endInvocationInterlock()	Jason Ekstrand	1	-2/+6
2019-05-30	intel/fs,vec4: Use g0 as the header for MFENCE	Jason Ekstrand	1	-4/+5
2019-04-18	intel/eu: force stride of 2 on NULL register for Byte instructions	Iago Toral Quiroga	1	-0/+11
2019-04-18	intel/compiler: set correct precision fields for 3-source float instructions	Iago Toral Quiroga	1	-0/+16
2019-04-18	intel/compiler: allow half-float on 3-source instructions since gen8	Iago Toral Quiroga	1	-1/+2
2019-04-18	intel/compiler: handle extended math restrictions for half-float	Iago Toral Quiroga	1	-2/+4
2019-02-28	intel/vec4: Drop dead code for handling typed surface messages	Jason Ekstrand	1	-89/+0
2019-02-25	intel/eu: Add an EOT parameter to send_indirect_[split]_message	Jason Ekstrand	1	-10/+15
2019-01-29	intel/eu: Add support for the SENDS[C] messages	Jason Ekstrand	1	-5/+136
2019-01-29	intel/inst: Indent some code	Jason Ekstrand	1	-177/+183
2019-01-29	intel/fs: Use SHADER_OPCODE_SEND for surface messages	Jason Ekstrand	1	-72/+0
2019-01-29	intel/eu: Rework surface descriptor helpers	Jason Ekstrand	1	-234/+21
2019-01-29	intel/eu: Add has_simd4x2 bools to surface_write functions	Jason Ekstrand	1	-6/+8
2019-01-29	intel/fs: Take an explicit exec size in brw_surface_payload_size()	Jason Ekstrand	1	-20/+39
2019-01-23	intel/compiler: Reset default flag register in brw_find_live_channel()	Matt Turner	1	-2/+11
2019-01-18	intel/eu: Stop overriding exec sizes in send_indirect_message	Jason Ekstrand	1	-3/+0
2019-01-09	intel/compiler: Avoid false positive assertions	Matt Turner	1	-6/+6
2019-01-09	intel/eu/gen7: Fix brw_MOV() with DF destination and strided source.	Francisco Jerez	1	-7/+4
2018-12-10	intel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for scalar region	Sagar Ghuge	1	-1/+18
2018-10-23	intel/compiler: Change src1 reg type to unsigned doubleword	Sagar Ghuge	1	-1/+1
2018-08-22	intel/compiler: Implement untyped atomic float min, max, and compare-swap dat...	Ian Romanick	1	-0/+47
2018-07-09	intel/eu: Assert that the instruction is send-like in brw_set_desc_ex().	Francisco Jerez	1	-2/+3