diff options
| author | Rafael Antognolli <rafael.antognolli@intel.com> | 2020-03-03 08:07:32 -0800 |
|---|---|---|
| committer | Marge Bot <eric+marge@anholt.net> | 2020-03-03 19:52:06 +0000 |
| commit | 5f13996262a6d72ca5b5c235647d5257ae961b66 (patch) | |
| tree | d71f753fb929821016e0a381d4b498765cd2c691 /src | |
| parent | 42ee6ff706f864d7666603af282ab30544ee638a (diff) | |
intel/gen12+: Disable mid thread preemption.
Fixes a GPU hang in Car Chase.
Cc: mesa-stable@lists.freedesktop.org
v2: Add comment explaining why (Jason).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 12 | ||||
| -rw-r--r-- | src/intel/genxml/gen12.xml | 1 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 12 |
3 files changed, 25 insertions, 0 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 5574b073a79..6c760e04635 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -4378,6 +4378,18 @@ iris_store_cs_state(struct iris_context *ice, desc.BarrierEnable = cs_prog_data->uses_barrier; desc.CrossThreadConstantDataReadLength = cs_prog_data->push.cross_thread.regs; +#if GEN_GEN >= 12 + /* TODO: Check if we are missing workarounds and enable mid-thread + * preemption. + * + * We still have issues with mid-thread preemption (it was already + * disabled by the kernel on gen11, due to missing workarounds). It's + * possible that we are just missing some workarounds, and could enable + * it later, but for now let's disable it to fix a GPU in compute in Car + * Chase (and possibly more). + */ + desc.ThreadPreemptionDisable = true; +#endif } } diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml index 127bc549a8b..f9fd2321428 100644 --- a/src/intel/genxml/gen12.xml +++ b/src/intel/genxml/gen12.xml @@ -525,6 +525,7 @@ <value name="Ftz" value="0"/> <value name="SetByKernel" value="1"/> </field> + <field name="Thread Preemption Disable" start="84" end="84" type="bool"/> <field name="Sampler Count" start="98" end="100" type="uint"> <value name="No samplers used" value="0"/> <value name="Between 1 and 4 samplers used" value="1"/> diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index c9f8eaa6f51..52a363fc075 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -2354,6 +2354,18 @@ compute_pipeline_create( .CrossThreadConstantDataReadLength = cs_prog_data->push.cross_thread.regs, #endif +#if GEN_GEN >= 12 + /* TODO: Check if we are missing workarounds and enable mid-thread + * preemption. + * + * We still have issues with mid-thread preemption (it was already + * disabled by the kernel on gen11, due to missing workarounds). It's + * possible that we are just missing some workarounds, and could enable + * it later, but for now let's disable it to fix a GPU in compute in Car + * Chase (and possibly more). + */ + .ThreadPreemptionDisable = true, +#endif .NumberofThreadsinGPGPUThreadGroup = cs_prog_data->threads, }; |