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authorRob Clark <robdclark@chromium.org>2020-03-16 06:41:41 -0700
committerMarge Bot <eric+marge@anholt.net>2020-04-13 20:47:28 +0000
commitb787b353d04e23fdea567186f7cb422fd687bcdd (patch)
tree2ee5d5736e4d00db5cc95d76379d0eb258aee6b0 /src/freedreno
parent89a78a07dec8f6fab7a80bba951b134a42bb9a2c (diff)
freedreno/ir3: add mov/cov stats
While not always avoidable, cov instructions are a useful thing to look at to see if we could fold into src. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
Diffstat (limited to 'src/freedreno')
-rw-r--r--src/freedreno/ir3/ir3.c11
-rw-r--r--src/freedreno/ir3/ir3.h2
-rw-r--r--src/freedreno/ir3/ir3_shader.c3
3 files changed, 12 insertions, 4 deletions
diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c
index 6b6b83b62cf..f2dbc88f3bb 100644
--- a/src/freedreno/ir3/ir3.c
+++ b/src/freedreno/ir3/ir3.c
@@ -917,13 +917,11 @@ void * ir3_assemble(struct ir3 *shader, struct ir3_info *info,
{
uint32_t *ptr, *dwords;
+ memset(info, 0, sizeof(*info));
info->gpu_id = gpu_id;
info->max_reg = -1;
info->max_half_reg = -1;
info->max_const = -1;
- info->instrs_count = 0;
- info->sizedwords = 0;
- info->ss = info->sy = 0;
foreach_block (block, &shader->block_list) {
foreach_instr (instr, &block->instr_list) {
@@ -958,6 +956,13 @@ void * ir3_assemble(struct ir3 *shader, struct ir3_info *info,
info->nops_count += instr->nop;
if (instr->opc == OPC_NOP)
info->nops_count += 1 + instr->repeat;
+ if (instr->opc == OPC_MOV) {
+ if (instr->cat1.src_type == instr->cat1.dst_type) {
+ info->mov_count += 1 + instr->repeat;
+ } else {
+ info->cov_count += 1 + instr->repeat;
+ }
+ }
dwords += 2;
if (instr->flags & IR3_INSTR_SS) {
diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index 4dfcdf0da51..65c16791e62 100644
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -48,6 +48,8 @@ struct ir3_info {
uint16_t sizedwords;
uint16_t instrs_count; /* expanded to account for rpt's */
uint16_t nops_count; /* # of nop instructions, including nopN */
+ uint16_t mov_count;
+ uint16_t cov_count;
/* NOTE: max_reg, etc, does not include registers not touched
* by the shader (ie. vertex fetched via VFD_DECODE but not
* touched by shader)
diff --git a/src/freedreno/ir3/ir3_shader.c b/src/freedreno/ir3/ir3_shader.c
index e42f7713e09..80a56a53aa9 100644
--- a/src/freedreno/ir3/ir3_shader.c
+++ b/src/freedreno/ir3/ir3_shader.c
@@ -508,11 +508,12 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
fprintf(out, "\n");
/* print generic shader info: */
- fprintf(out, "; %s prog %d/%d: %u instr, %u nops, %u non-nops, %u dwords\n",
+ fprintf(out, "; %s prog %d/%d: %u instr, %u nops, %u non-nops, %u mov, %u cov, %u dwords\n",
type, so->shader->id, so->id,
so->info.instrs_count,
so->info.nops_count,
so->info.instrs_count - so->info.nops_count,
+ so->info.mov_count, so->info.cov_count,
so->info.sizedwords);
fprintf(out, "; %s prog %d/%d: %u last-baryf, %d half, %d full, %u constlen\n",