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2014-05-14drm/i915: add null render states for gen6, gen7 and gen8render_stateMika Kuoppala3-3/+994
2014-05-14drm/i915: add render state initializationMika Kuoppala8-0/+286
2014-05-14drm/i915: use dev_priv directly in i915_driver_unloadDaniel Vetter1-1/+1
2014-05-14drm/i915: Use the connector name in fbdev debug messagesChris Wilson1-10/+14
2014-05-14drm/i915: Use for_each_crtc() when iterating through the CRTCsDamien Lespiau4-16/+16
2014-05-14drm/i915: Introduce a for_each_crtc() macroDamien Lespiau1-0/+3
2014-05-14drm/i915: Use for_each_intel_crtc() when iterating through intel_crtcsDamien Lespiau3-38/+25
2014-05-14drm/i915: Introduce a for_each_intel_crtc() macroDamien Lespiau1-0/+3
2014-05-13drm/i915: Use ilk_wm_max_level() in latency debugfs filesDamien Lespiau3-3/+4
2014-05-13drm/i915: Don't cast void* pointersDamien Lespiau1-37/+37
2014-05-13drm/i915: Work-around garbage DR4 from UXADaniel Vetter1-0/+5
2014-05-13drm/i915: WARN_ON fence pin leaksDaniel Vetter2-20/+28
2014-05-13drm/i915: Kill vblank waits after pipe enable on gmch platformsVille Syrjälä1-4/+0
2014-05-13drm/i915: Disable/enable planes as the first/last thing during modeset on gmc...Ville Syrjälä1-6/+6
2014-05-13drm/i915: Ringbuffer signal func for the second BSD ringOscar Mateo1-0/+1
2014-05-13x86/gpu: Sprinkle const, __init and __initconst to stolen memory quirksVille Syrjälä1-10/+10
2014-05-13x86/gpu: Implement stolen memory size early quirk for CHVDamien Lespiau1-1/+27
2014-05-13drm/i915/chv: Implement stolen memory size detectionDamien Lespiau1-2/+36
2014-05-13drm/i915/chv: CHV doesn't have CRT outputVille Syrjälä1-1/+1
2014-05-13drm/i915/chv: Add DPLL state readout supportVille Syrjälä1-1/+33
2014-05-12drm/i915/chv: Pipe select change for DP and HDMIChon Ming Lee4-2/+20
2014-05-12drm/i915/chv: Add phy supports for CherryviewChon Ming Lee2-2/+270
2014-05-12drm/i915/chv: Add update and enable pll for CherryviewChon Ming Lee2-2/+202
2014-05-12drm/i915/chv: find the best divisor for the target clock v4Chon Ming Lee2-0/+107
2014-05-12drm/i915/chv: Trigger phy common lane resetChon Ming Lee2-15/+65
2014-05-12drm/i915/chv: Add vlv_pipe_to_channelChon Ming Lee1-0/+14
2014-05-12drm/i915/chv: Update Cherryview DPLL changes to support Port D. v2Chon Ming Lee3-2/+16
2014-05-12drm/i915/chv: Add DPIO offset for Cherryview. v3Chon Ming Lee3-2/+13
2014-05-12drm/i915/chv: Add DDL register defines for CherryviewVille Syrjälä1-0/+29
2014-05-12srm/i915/chv: Add Cherryview PCI IDsVille Syrjälä2-1/+17
2014-05-12drm/i915/chv: Initial clock gating support for CherryviewVille Syrjälä1-0/+13
2014-05-12drm/i915/chv: Add Cherryview interrupt registers into debugfsVille Syrjälä1-1/+41
2014-05-12drm/i915: Drop unecessary casts in i915_irq.cDaniel Vetter1-6/+6
2014-05-12drm/i915/chv: Preliminary interrupt support for CherryviewVille Syrjälä1-1/+224
2014-05-12drm/i915: Use hash tables for the command parserBrad Volkin4-38/+140
2014-05-12drm/i915: Convert gmch platforms over to ilk_crtc_{enable, disable}_planes()Ville Syrjälä1-78/+56
2014-05-08drm/i915: Flush request queue when waiting for ring spaceChris Wilson3-27/+16
2014-05-08drm/i915: Improve fallback ring waitingChris Wilson1-6/+16
2014-05-07drm/i915: Make aliasing a 2nd class VMBen Widawsky1-0/+4
2014-05-07drm/i915: Use topdown allocation for PPGTT PDEs on gen6/7Ben Widawsky1-2/+1
2014-05-07drm/i915: vlv: enable runtime PMImre Deak1-1/+1
2014-05-07drm/i915: vlv: add runtime PM supportImre Deak2-0/+389
2014-05-07drm/i915: propagate the error code from runtime PM callbacksImre Deak1-15/+42
2014-05-07drm/i915: add various missing GTI/Gunit register definitionsImre Deak1-1/+40
2014-05-06drm/i915/chv: Add DPINVGTT registers defines for CherryviewVille Syrjälä1-1/+11
2014-05-06drm/i915/chv: Add display interrupt registers bits for CherryviewVille Syrjälä1-1/+20
2014-05-06drm/i915/chv: Add DPFLIPSTAT register bits for CherryviewVille Syrjälä1-0/+7
2014-05-06drm/i915/chv: Add PIPESTAT register bits for CherryviewVille Syrjälä1-0/+8
2014-05-06drm/i915/chv: Enable aliasing PPGTT for CHVVille Syrjälä1-3/+4
2014-05-06drm/i915/chv: Flush caches when programming page tablesRafael Barbalho1-1/+10
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