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authorMika Kuoppala <mika.kuoppala@intel.com>2015-05-19 17:15:31 +0300
committerMika Kuoppala <mika.kuoppala@intel.com>2015-05-19 17:19:52 +0300
commit36869ae65e1dd3165dbd15531bd6774c840cf311 (patch)
treee04830f8ecd02b95a3b0ee9f034fb5f0a53075cd
parentc375588ecd29dcecf3de9faa714f0605627e0e13 (diff)
drm/i915: Force PD restore on execlist submissionskl_masked_write
If two consecutive execlist entries have same lrca, and the the va mapping has changed, lite restore will not flush tlbs. Also we don't yet track tlbs dirtyness properly with gen8 dynamic page tables. Until the lrca tracking and the ppgtt dirtyness have been done, explicitly force PD restore on every submission. Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index d1600ac012e8..732c9939c444 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -284,6 +284,8 @@ static uint64_t execlists_ctx_descriptor(struct intel_engine_cs *ring,
* signalling between Command Streamers */
/* desc |= GEN8_CTX_FORCE_RESTORE; */
+ desc |= GEN8_CTX_FORCE_PD_RESTORE;
+
/* WaEnableForceRestoreInCtxtDescForVCS:skl */
if (IS_GEN9(dev) &&
INTEL_REVID(dev) <= SKL_REVID_B0 &&