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path: root/src/intel/compiler
AgeCommit message (Expand)AuthorFilesLines
2017-04-24intel/fs: Take into account amount of data read in spilling cost heuristic.Francisco Jerez1-1/+1
2017-04-24intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.Francisco Jerez1-2/+1
2017-04-24i965/vec4: Use reads_accumulator_implicitly(), not MACH checks.Kenneth Graunke1-4/+4
2017-04-24nir/i965: add before ffma algebraic optsTimothy Arceri1-0/+6
2017-04-22i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().Kenneth Graunke1-0/+7
2017-04-14i965: Use correct VertStride on align16 instructions.Matt Turner1-10/+34
2017-04-14i965/vec4/dce: improve track of partial flag register writesSamuel Iglesias Gonsálvez1-1/+1
2017-04-14i965/vec4: don't do horizontal stride on some register file typesSamuel Iglesias Gonsálvez1-2/+5
2017-04-14i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.Matt Turner1-4/+12
2017-04-14i965/vec4: use vec4_builder to emit instructions in setup_imm_df()Samuel Iglesias Gonsálvez2-50/+50
2017-04-14i965/vec4: consider subregister offset in live variablesJuan A. Suarez Romero1-2/+2
2017-04-14i965/vec4: fix assert to detect SIMD lowered DF instructions in IVBFrancisco Jerez1-5/+1
2017-04-14i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's typeSamuel Iglesias Gonsálvez7-27/+60
2017-04-14i965/vec4: split d2x conversion and data gathering from one opcode to two exp...Samuel Iglesias Gonsálvez2-8/+1
2017-04-14i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYTJuan A. Suarez Romero1-7/+19
2017-04-14i965/vec4: keep original type when dealing with null registersJuan A. Suarez Romero1-0/+2
2017-04-14i965/vec4: split DF instructions and later double its execsize in IVB/BYTSamuel Iglesias Gonsálvez3-1/+53
2017-04-14i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYTSamuel Iglesias Gonsálvez1-0/+9
2017-04-14i965/fs: Get 64-bit indirect moves working on IVB.Francisco Jerez1-2/+25
2017-04-14i965: Use source region <1,2,0> when converting to DF.Matt Turner2-13/+28
2017-04-14i965/fs: fix lower SIMD width for IVB/BYT's MOV_INDIRECTJuan A. Suarez Romero1-3/+14
2017-04-14i965/fs: fix dst stride in IVB/BYT type conversionsJuan A. Suarez Romero1-27/+41
2017-04-14i965/fs: rename lower_d2x to lower_conversionsSamuel Iglesias Gonsálvez3-3/+3
2017-04-14Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."Samuel Iglesias Gonsálvez1-2/+0
2017-04-14i965/fs: generalize the legalization d2x passSamuel Iglesias Gonsálvez2-37/+67
2017-04-14i965: Use <0,2,1> region for scalar DF sources on IVB/BYT.Matt Turner1-0/+13
2017-04-14i965/fs: clamp exec_size when an instruction has a scalar DF sourceSamuel Iglesias Gonsálvez1-3/+8
2017-04-14i965/fs: double regioning parameters and execsize for DF in IVB/BYTJuan A. Suarez Romero1-7/+43
2017-04-14i965/fs: add helper to retrieve instruction execution typeJuan A. Suarez Romero3-5/+64
2017-04-14i965: Handle IVB DF differences in the validator.Matt Turner1-0/+24
2017-04-14i965/disasm: also print nibctrl in IVB for execsize=8Iago Toral Quiroga1-3/+3
2017-04-11i965/fs: Take into account lower frequency of conditional blocks in spilling ...Francisco Jerez1-5/+14
2017-04-04i965/fs: Always provide a default LOD of 0 for TXS and TXLJason Ekstrand1-9/+9
2017-04-03intel/vec4: Add some fall through commentsJason Ekstrand1-0/+4
2017-03-29i965: expose BRW_OPCODE_[F32TO16/F16TO32] name on gen8+Alejandro Piñeiro1-0/+9
2017-03-27i965/fs: Don't emit SEL instructions for type-converting MOVs.Matt Turner1-0/+2
2017-03-24anv/pipeline: make FragCoord include sample positions when sample shadingIago Toral Quiroga1-0/+1
2017-03-23i965: Replace OPT_V() with OPT().Matt Turner1-23/+19
2017-03-23i965/fs: Return progress from demote_sample_qualifiers().Matt Turner1-1/+6
2017-03-23i965/fs: Return progress from move_interpolation_to_top().Matt Turner1-1/+6
2017-03-22intel/compiler: consistently use ifndef guards over pragma onceEmil Velikov8-5/+31
2017-03-22i965: make brw_setup_image_uniform_values staticEmil Velikov1-5/+0
2017-03-14nir: Rework conversion opcodesJason Ekstrand3-67/+45
2017-03-14i965/fs: Re-arrange conversion operationsJason Ekstrand1-36/+31
2017-03-14i965/vec4: Get rid of the type parameter from to/from_doubleJason Ekstrand2-24/+15
2017-03-14i965/fs: Use num_components from the SSA def in image intrinsicsJason Ekstrand1-2/+1
2017-03-13intel: fix compiler buildIago Toral Quiroga1-0/+7
2017-03-13intel/compiler: whitespace cleanupsEmil Velikov2-5/+0
2017-03-13intel/compiler: link all tests again gtest, even test_eu_compact"Emil Velikov1-1/+1
2017-03-13i965: Move the back-end compiler to src/intel/compilerJason Ekstrand95-0/+63683
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