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| author | Ian Romanick <ian.d.romanick@intel.com> | 2019-02-27 08:50:31 -0800 |
|---|---|---|
| committer | Ian Romanick <ian.d.romanick@intel.com> | 2019-03-26 10:29:22 -0700 |
| commit | 042f16e6afbfdeb2174d1b6b4e9ae3e225319f63 (patch) | |
| tree | 508690172b0877aaa0b5786c3fbc091c991485e5 | |
| parent | a9a65c6071905190e1663521cabbe698bd51b6fe (diff) | |
b32csel
squash! WIP: intel/compiler: Import Gen8 / Gen9 ALU machine description
| -rw-r--r-- | src/intel/compiler/gen8_md.py | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/intel/compiler/gen8_md.py b/src/intel/compiler/gen8_md.py index 8b0161a82286..c993c993196e 100644 --- a/src/intel/compiler/gen8_md.py +++ b/src/intel/compiler/gen8_md.py @@ -566,6 +566,23 @@ gen8_md = [ (('extract_i16', a, 1), Instruction('MOV', r, subscript(a, W, 1))), (('extract_i16', a, 2), Instruction('MOV', r, subscript(a, W, 2))), (('extract_i16', a, 3), Instruction('MOV', r, subscript(a, W, 3))), + + # Select + (('b32csel', 'a(front_face)', 1.0, -1.0), InstructionList([(t0, D), ], + (Instruction('OR', + subscript(t0, W, 1), + retype(grf(0, 0, 1), W), + imm(0x3f80, W)), + Instruction('AND', retype(r, UD), retype(t0, UD), imm(0xbf800000, UD)))) + ), + (('b32csel', 'a(front_face)', -1.0, 1.0), InstructionList([(t0, D), ], + (Instruction('OR', subscript(t0, W, 1), neg(retype(grf(0, 0, 1), W)), imm(0x3f80, W)), + Instruction('AND', retype(r, UD), retype(t0, UD), imm(0xbf800000, UD)))) + ), + (('b32csel', a, b, c), InstructionList([], + (Instruction('CMP', null(D), a, imm(0, D)).cmod('NZ'), + Instruction('SEL', r, b, c).predicate())) + ), ] gen8_unsupported = [ |