diff options
Diffstat (limited to 'extras')
6 files changed, 189 insertions, 179 deletions
diff --git a/extras/Mesa/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/extras/Mesa/src/mesa/drivers/dri/r200/r200_cmdbuf.c index 08dab8a4d..0c8ef57b9 100644 --- a/extras/Mesa/src/mesa/drivers/dri/r200/r200_cmdbuf.c +++ b/extras/Mesa/src/mesa/drivers/dri/r200/r200_cmdbuf.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_cmdbuf.c,v 1.1 2002/10/30 12:51:51 alanh Exp $ */ +/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_cmdbuf.c,v 1.1.1.2tsi Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. @@ -44,7 +44,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r200_ioctl.h" #include "r200_tcl.h" #include "r200_sanity.h" -#include "radeon_reg.h" +#include "r200_reg.h" static void print_state_atom( struct r200_state_atom *state ) { @@ -58,112 +58,139 @@ static void print_state_atom( struct r200_state_atom *state ) } -static void r200_emit_state_list( r200ContextPtr rmesa, - struct r200_state_atom *list ) +/* The state atoms will be emitted in the order they appear in the atom list, + * so this step is important. + */ +void r200SetUpAtomList( r200ContextPtr rmesa ) { - struct r200_state_atom *state, *tmp; - char *dest; - int i, size; - - size = 0; - foreach_s( state, tmp, list ) { - if (state->check( rmesa->glCtx, state->idx )) { -/* dest = r200AllocCmdBuf( rmesa, state->cmd_size * 4, __FUNCTION__); - memcpy( dest, state->cmd, state->cmd_size * 4);*/ - size += state->cmd_size; - state->dirty = GL_TRUE; - move_to_head( &(rmesa->hw.clean), state ); - if (R200_DEBUG & DEBUG_STATE) - print_state_atom( state ); - } - else if (R200_DEBUG & DEBUG_STATE) - fprintf(stderr, "skip state %s\n", state->name); - } - - if (!size) - return; + int i, mtu; + + mtu = rmesa->glCtx->Const.MaxTextureUnits; + + make_empty_list(&rmesa->hw.atomlist); + rmesa->hw.atomlist.name = "atom-list"; + + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.ctx ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.set ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.lin ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.msk ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.vpt ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.vtx ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.vap ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.vte ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.msc ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.cst ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.zbs ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tcl ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.msl ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tcg ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.grd ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.fog ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tam ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tf ); + for (i = 0; i < mtu; ++i) + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tex[i] ); + for (i = 0; i < mtu; ++i) + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.cube[i] ); + for (i = 0; i < 6; ++i) + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.pix[i] ); - dest = r200AllocCmdBuf( rmesa, size * 4, __FUNCTION__); - -#define EMIT_ATOM(ATOM) \ -do { \ - if (rmesa->hw.ATOM.dirty) { \ - rmesa->hw.ATOM.dirty = GL_FALSE; \ - memcpy( dest, rmesa->hw.ATOM.cmd, rmesa->hw.ATOM.cmd_size * 4); \ - dest += rmesa->hw.ATOM.cmd_size * 4; \ - } \ -} while (0) - - EMIT_ATOM (ctx); - EMIT_ATOM (set); - EMIT_ATOM (lin); - EMIT_ATOM (msk); - EMIT_ATOM (vpt); - EMIT_ATOM (vtx); - EMIT_ATOM (vap); - EMIT_ATOM (vte); - EMIT_ATOM (msc); - EMIT_ATOM (cst); - EMIT_ATOM (zbs); - EMIT_ATOM (tcl); - EMIT_ATOM (msl); - EMIT_ATOM (tcg); - EMIT_ATOM (grd); - EMIT_ATOM (fog); - EMIT_ATOM (tam); - EMIT_ATOM (tf); - for (i = 0; i < 2; ++i) { - EMIT_ATOM (tex[i]); - } - for (i = 0; i < 2; ++i) { - EMIT_ATOM (cube[i]); - } - for (i = 0; i < 5; ++i) - EMIT_ATOM (mat[i]); - EMIT_ATOM (eye); - EMIT_ATOM (glt); - for (i = 0; i < 2; ++i) { - EMIT_ATOM (mtl[i]); - } for (i = 0; i < 8; ++i) - EMIT_ATOM (lit[i]); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.lit[i] ); + for (i = 0; i < 3 + mtu; ++i) + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.mat[i] ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.eye ); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.glt ); + for (i = 0; i < 2; ++i) + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.mtl[i] ); for (i = 0; i < 6; ++i) - EMIT_ATOM (ucp[i]); - for (i = 0; i < 6; ++i) - EMIT_ATOM (pix[i]); + insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.ucp[i] ); +} -#undef EMIT_ATOM +static void r200SaveHwState( r200ContextPtr rmesa ) +{ + struct r200_state_atom *atom; + char * dest = rmesa->backup_store.cmd_buf; -} + if (R200_DEBUG & DEBUG_STATE) + fprintf(stderr, "%s\n", __FUNCTION__); + + rmesa->backup_store.cmd_used = 0; + foreach( atom, &rmesa->hw.atomlist ) { + if ( atom->check( rmesa->glCtx, atom->idx ) ) { + int size = atom->cmd_size * 4; + memcpy( dest, atom->cmd, size); + dest += size; + rmesa->backup_store.cmd_used += size; + if (R200_DEBUG & DEBUG_STATE) + print_state_atom( atom ); + } + } + + assert( rmesa->backup_store.cmd_used <= R200_CMD_BUF_SZ ); + if (R200_DEBUG & DEBUG_STATE) + fprintf(stderr, "Returning to r200EmitState\n"); +} void r200EmitState( r200ContextPtr rmesa ) { - struct r200_state_atom *state, *tmp; + char *dest; + int mtu; + struct r200_state_atom *atom; if (R200_DEBUG & (DEBUG_STATE|DEBUG_PRIMS)) fprintf(stderr, "%s\n", __FUNCTION__); - /* Somewhat overkill: - */ - if ( rmesa->lost_context) { - if (R200_DEBUG & (DEBUG_STATE|DEBUG_PRIMS|DEBUG_IOCTL)) - fprintf(stderr, "%s - lost context\n", __FUNCTION__); + if (rmesa->save_on_next_emit) { + r200SaveHwState(rmesa); + rmesa->save_on_next_emit = GL_FALSE; + } + + if (!rmesa->hw.is_dirty && !rmesa->hw.all_dirty) + return; - foreach_s( state, tmp, &(rmesa->hw.clean) ) - move_to_tail(&(rmesa->hw.dirty), state ); + mtu = rmesa->glCtx->Const.MaxTextureUnits; - rmesa->lost_context = 0; + /* To avoid going across the entire set of states multiple times, just check + * for enough space for the case of emitting all state, and inline the + * r200AllocCmdBuf code here without all the checks. + */ + r200EnsureCmdBufSpace( rmesa, rmesa->hw.max_state_size ); + + /* we need to calculate dest after EnsureCmdBufSpace + as we may flush the buffer - airlied */ + dest = rmesa->store.cmd_buf + rmesa->store.cmd_used; + if (R200_DEBUG & DEBUG_STATE) { + foreach( atom, &rmesa->hw.atomlist ) { + if ( atom->dirty || rmesa->hw.all_dirty ) { + if ( atom->check( rmesa->glCtx, atom->idx ) ) + print_state_atom( atom ); + else + fprintf(stderr, "skip state %s\n", atom->name); + } + } } -/* else { - move_to_tail( &rmesa->hw.dirty, &rmesa->hw.mtl[0] );*/ - /* odd bug? -- isosurf, cycle between reflect & lit */ -/* }*/ - r200_emit_state_list( rmesa, &rmesa->hw.dirty ); -} + foreach( atom, &rmesa->hw.atomlist ) { + if ( rmesa->hw.all_dirty ) + atom->dirty = GL_TRUE; + if ( atom->dirty ) { + if ( atom->check( rmesa->glCtx, atom->idx ) ) { + int size = atom->cmd_size * 4; + memcpy( dest, atom->cmd, size); + dest += size; + rmesa->store.cmd_used += size; + atom->dirty = GL_FALSE; + } + } + } + assert( rmesa->store.cmd_used <= R200_CMD_BUF_SZ ); + rmesa->hw.is_dirty = GL_FALSE; + rmesa->hw.all_dirty = GL_FALSE; +} /* Fire a section of the retained (indexed_verts) buffer as a regular * primtive. @@ -172,7 +199,7 @@ extern void r200EmitVbufPrim( r200ContextPtr rmesa, GLuint primitive, GLuint vertex_nr ) { - drmRadeonCmdHeader *cmd; + drm_radeon_cmd_header_t *cmd; assert(!(primitive & R200_VF_PRIM_WALK_IND)); @@ -182,7 +209,7 @@ extern void r200EmitVbufPrim( r200ContextPtr rmesa, fprintf(stderr, "%s cmd_used/4: %d prim %x nr %d\n", __FUNCTION__, rmesa->store.cmd_used/4, primitive, vertex_nr); - cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 3 * sizeof(*cmd), + cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, VBUF_BUFSZ, __FUNCTION__ ); cmd[0].i = 0; cmd[0].header.cmd_type = RADEON_CMD_PACKET3_CLIP; @@ -225,7 +252,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa, GLuint primitive, GLuint min_nr ) { - drmRadeonCmdHeader *cmd; + drm_radeon_cmd_header_t *cmd; GLushort *retval; if (R200_DEBUG & DEBUG_IOCTL) @@ -235,8 +262,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa, r200EmitState( rmesa ); - cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, - 12 + min_nr*2, + cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, ELTS_BUFSZ(min_nr), __FUNCTION__ ); cmd[0].i = 0; cmd[0].header.cmd_type = RADEON_CMD_PACKET3_CLIP; @@ -268,13 +294,13 @@ void r200EmitVertexAOS( r200ContextPtr rmesa, GLuint vertex_size, GLuint offset ) { - drmRadeonCmdHeader *cmd; + drm_radeon_cmd_header_t *cmd; if (R200_DEBUG & (DEBUG_PRIMS|DEBUG_IOCTL)) fprintf(stderr, "%s: vertex_size 0x%x offset 0x%x \n", __FUNCTION__, vertex_size, offset); - cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 5 * sizeof(int), + cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, VERT_AOS_BUFSZ, __FUNCTION__ ); cmd[0].header.cmd_type = RADEON_CMD_PACKET3; @@ -290,19 +316,18 @@ void r200EmitAOS( r200ContextPtr rmesa, GLuint nr, GLuint offset ) { - drmRadeonCmdHeader *cmd; - int sz = 3 + ((nr/2)*3) + ((nr&1)*2); + drm_radeon_cmd_header_t *cmd; + int sz = AOS_BUFSZ(nr); int i; int *tmp; if (R200_DEBUG & DEBUG_IOCTL) fprintf(stderr, "%s nr arrays: %d\n", __FUNCTION__, nr); - cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, sz * sizeof(int), - __FUNCTION__ ); + cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, sz, __FUNCTION__ ); cmd[0].i = 0; cmd[0].header.cmd_type = RADEON_CMD_PACKET3; - cmd[1].i = R200_CP_CMD_3D_LOAD_VBPNTR | ((sz-3) << 16); + cmd[1].i = R200_CP_CMD_3D_LOAD_VBPNTR | (((sz / sizeof(int)) - 3) << 16); cmd[2].i = nr; tmp = &cmd[0].i; cmd += 3; @@ -340,7 +365,7 @@ void r200EmitBlit( r200ContextPtr rmesa, GLint dstx, GLint dsty, GLuint w, GLuint h ) { - drmRadeonCmdHeader *cmd; + drm_radeon_cmd_header_t *cmd; if (R200_DEBUG & DEBUG_IOCTL) fprintf(stderr, "%s src %x/%x %d,%d dst: %x/%x %d,%d sz: %dx%d\n", @@ -356,7 +381,7 @@ void r200EmitBlit( r200ContextPtr rmesa, assert( w < (1<<16) ); assert( h < (1<<16) ); - cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 8 * sizeof(int), + cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 8 * sizeof(int), __FUNCTION__ ); @@ -383,11 +408,11 @@ void r200EmitBlit( r200ContextPtr rmesa, void r200EmitWait( r200ContextPtr rmesa, GLuint flags ) { if (rmesa->dri.drmMinor >= 6) { - drmRadeonCmdHeader *cmd; + drm_radeon_cmd_header_t *cmd; assert( !(flags & ~(RADEON_WAIT_2D|RADEON_WAIT_3D)) ); - cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 1 * sizeof(int), + cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 1 * sizeof(int), __FUNCTION__ ); cmd[0].i = 0; cmd[0].wait.cmd_type = RADEON_CMD_WAIT; diff --git a/extras/Mesa/src/mesa/drivers/dri/r200/r200_ioctl.c b/extras/Mesa/src/mesa/drivers/dri/r200/r200_ioctl.c index 4471d4bc3..d4492636e 100644 --- a/extras/Mesa/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/extras/Mesa/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_ioctl.c,v 1.5tsi Exp $ */ +/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_ioctl.c,v 1.6tsi Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. @@ -47,7 +47,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r200_ioctl.h" #include "r200_tcl.h" #include "r200_sanity.h" -#include "radeon_reg.h" +#include "r200_reg.h" #include "vblank.h" diff --git a/extras/Mesa/src/mesa/drivers/dri/r200/r200_reg.h b/extras/Mesa/src/mesa/drivers/dri/r200/r200_reg.h index 8e9126342..c60a1ad2b 100644 --- a/extras/Mesa/src/mesa/drivers/dri/r200/r200_reg.h +++ b/extras/Mesa/src/mesa/drivers/dri/r200/r200_reg.h @@ -1,4 +1,4 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_reg.h,v 1.2 2002/12/16 16:18:54 dawes Exp $ */ +/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_reg.h,v 1.1.1.2tsi Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. @@ -30,6 +30,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #ifndef _R200_REG_H_ #define _R200_REG_H_ +#include "radeon_reg.h" + #define R200_PP_MISC 0x1c14 #define R200_REF_ALPHA_MASK 0x000000ff #define R200_ALPHA_TEST_FAIL (0 << 8) @@ -58,6 +60,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_FOG_USE_DIFFUSE_ALPHA (2 << 25) #define R200_FOG_USE_SPEC_ALPHA (3 << 25) #define R200_FOG_USE_VTX_FOG (4 << 25) +#define R200_FOG_USE_MASK (7 << 25) #define R200_RE_SOLID_COLOR 0x1c1c #define R200_RB3D_BLENDCNTL 0x1c20 #define R200_COMB_FCN_MASK (7 << 12) @@ -69,39 +72,26 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_COMB_FCN_MAX (5 << 12) #define R200_COMB_FCN_RSUB_CLAMP (6 << 12) #define R200_COMB_FCN_RSUB_NOCLAMP (7 << 12) -#define R200_SRC_BLEND_GL_ZERO (32 << 16) -#define R200_SRC_BLEND_GL_ONE (33 << 16) -#define R200_SRC_BLEND_GL_SRC_COLOR (34 << 16) -#define R200_SRC_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 16) -#define R200_SRC_BLEND_GL_DST_COLOR (36 << 16) -#define R200_SRC_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 16) -#define R200_SRC_BLEND_GL_SRC_ALPHA (38 << 16) -#define R200_SRC_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 16) -#define R200_SRC_BLEND_GL_DST_ALPHA (40 << 16) -#define R200_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 16) -#define R200_SRC_BLEND_GL_SRC_ALPHA_SATURATE (42 << 16) -#define R200_SRC_BLEND_GL_CONST_COLOR (43 << 16) -#define R200_SRC_BLEND_GL_ONE_MINUS_CONST_COLOR (44 << 16) -#define R200_SRC_BLEND_GL_CONST_ALPHA (45 << 16) -#define R200_SRC_BLEND_GL_ONE_MINUS_CONST_ALPHA (46 << 16) -#define R200_SRC_BLEND_MASK (63 << 16) -#define R200_DST_BLEND_GL_ZERO (32 << 24) -#define R200_DST_BLEND_GL_ONE (33 << 24) -#define R200_DST_BLEND_GL_SRC_COLOR (34 << 24) -#define R200_DST_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 24) -#define R200_DST_BLEND_GL_DST_COLOR (36 << 24) -#define R200_DST_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 24) -#define R200_DST_BLEND_GL_SRC_ALPHA (38 << 24) -#define R200_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 24) -#define R200_DST_BLEND_GL_DST_ALPHA (40 << 24) -#define R200_DST_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 24) -#define R200_DST_BLEND_GL_CONST_COLOR (43 << 24) -#define R200_DST_BLEND_GL_ONE_MINUS_CONST_COLOR (44 << 24) -#define R200_DST_BLEND_GL_CONST_ALPHA (45 << 24) -#define R200_DST_BLEND_GL_ONE_MINUS_CONST_ALPHA (46 << 24) -#define R200_DST_BLEND_MASK (63 << 24) -#define R200_RB3D_DEPTHOFFSET 0x1c24 -#define R200_RB3D_DEPTHPITCH 0x1c28 +#define R200_BLEND_GL_ZERO (32) +#define R200_BLEND_GL_ONE (33) +#define R200_BLEND_GL_SRC_COLOR (34) +#define R200_BLEND_GL_ONE_MINUS_SRC_COLOR (35) +#define R200_BLEND_GL_DST_COLOR (36) +#define R200_BLEND_GL_ONE_MINUS_DST_COLOR (37) +#define R200_BLEND_GL_SRC_ALPHA (38) +#define R200_BLEND_GL_ONE_MINUS_SRC_ALPHA (39) +#define R200_BLEND_GL_DST_ALPHA (40) +#define R200_BLEND_GL_ONE_MINUS_DST_ALPHA (41) +#define R200_BLEND_GL_SRC_ALPHA_SATURATE (42) /* src factor only */ +#define R200_BLEND_GL_CONST_COLOR (43) +#define R200_BLEND_GL_ONE_MINUS_CONST_COLOR (44) +#define R200_BLEND_GL_CONST_ALPHA (45) +#define R200_BLEND_GL_ONE_MINUS_CONST_ALPHA (46) +#define R200_BLEND_MASK (63) +#define R200_SRC_BLEND_SHIFT (16) +#define R200_DST_BLEND_SHIFT (24) +#define R200_RB3D_DEPTHOFFSET 0x1c24 +#define R200_RB3D_DEPTHPITCH 0x1c28 #define R200_DEPTHPITCH_MASK 0x00001ff8 #define R200_DEPTH_ENDIAN_NO_SWAP (0 << 18) #define R200_DEPTH_ENDIAN_WORD_SWAP (1 << 18) @@ -501,6 +491,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_OUTPUT_TEX_4 (1<<20) #define R200_OUTPUT_TEX_5 (1<<21) #define R200_OUTPUT_TEX_MASK (0x3f<<16) +#define R200_OUTPUT_DISCRETE_FOG (1<<24) #define R200_OUTPUT_PT_SIZE (1<<25) #define R200_FORCE_INORDER_PROC (1<<31) #define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0 0x2254 @@ -1039,6 +1030,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TXC_ARG_A_TFACTOR1_ALPHA (27) #define R200_TXC_ARG_A_MASK (31 << 0) #define R200_TXC_ARG_A_SHIFT 0 +#ifndef R200_TXC_ARG_B_ZERO /* Might be in radeon_reg.h */ #define R200_TXC_ARG_B_ZERO (0<<5) #define R200_TXC_ARG_B_CURRENT_COLOR (2<<5) #define R200_TXC_ARG_B_CURRENT_ALPHA (3<<5) @@ -1062,8 +1054,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TXC_ARG_B_R5_ALPHA (21<<5) #define R200_TXC_ARG_B_TFACTOR1_COLOR (26<<5) #define R200_TXC_ARG_B_TFACTOR1_ALPHA (27<<5) +#endif #define R200_TXC_ARG_B_MASK (31 << 5) #define R200_TXC_ARG_B_SHIFT 5 +#ifndef R200_TXC_ARG_C_ZERO /* Might be in radeon_reg.h */ #define R200_TXC_ARG_C_ZERO (0<<10) #define R200_TXC_ARG_C_CURRENT_COLOR (2<<10) #define R200_TXC_ARG_C_CURRENT_ALPHA (3<<10) @@ -1087,6 +1081,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TXC_ARG_C_R5_ALPHA (21<<10) #define R200_TXC_ARG_C_TFACTOR1_COLOR (26<<10) #define R200_TXC_ARG_C_TFACTOR1_ALPHA (27<<10) +#endif #define R200_TXC_ARG_C_MASK (31 << 10) #define R200_TXC_ARG_C_SHIFT 10 #define R200_TXC_COMP_ARG_A (1 << 16) @@ -1184,6 +1179,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TXA_ARG_A_TFACTOR1_BLUE (27) #define R200_TXA_ARG_A_MASK (31 << 0) #define R200_TXA_ARG_A_SHIFT 0 +#ifndef R200_TXA_ARG_B_ZERO /* Might be in radeon_reg.h */ #define R200_TXA_ARG_B_ZERO (0<<5) #define R200_TXA_ARG_B_CURRENT_ALPHA (2<<5) /* guess */ #define R200_TXA_ARG_B_CURRENT_BLUE (3<<5) /* guess */ @@ -1207,8 +1203,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TXA_ARG_B_R5_BLUE (21<<5) #define R200_TXA_ARG_B_TFACTOR1_ALPHA (26<<5) #define R200_TXA_ARG_B_TFACTOR1_BLUE (27<<5) +#endif #define R200_TXA_ARG_B_MASK (31 << 5) #define R200_TXA_ARG_B_SHIFT 5 +#ifndef R200_TXA_ARG_C_ZERO /* Might be in radeon_reg.h */ #define R200_TXA_ARG_C_ZERO (0<<10) #define R200_TXA_ARG_C_CURRENT_ALPHA (2<<10) /* guess */ #define R200_TXA_ARG_C_CURRENT_BLUE (3<<10) /* guess */ @@ -1232,6 +1230,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TXA_ARG_C_R5_BLUE (21<<10) #define R200_TXA_ARG_C_TFACTOR1_ALPHA (26<<10) #define R200_TXA_ARG_C_TFACTOR1_BLUE (27<<10) +#endif #define R200_TXA_ARG_C_MASK (31 << 10) #define R200_TXA_ARG_C_SHIFT 10 #define R200_TXA_COMP_ARG_A (1 << 16) @@ -1320,6 +1319,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_PP_TXABLEND_7 0x2f78 #define R200_PP_TXABLEND2_7 0x2f7c /* gap */ +#define R200_RB3D_BLENDCOLOR 0x3218 /* ARGB 8888 */ #define R200_RB3D_ABLENDCNTL 0x321C /* see BLENDCTL */ #define R200_RB3D_CBLENDCNTL 0x3220 /* see BLENDCTL */ diff --git a/extras/Mesa/src/mesa/drivers/dri/r200/r200_sanity.c b/extras/Mesa/src/mesa/drivers/dri/r200/r200_sanity.c index 0a44a5882..7aa1ac94e 100644 --- a/extras/Mesa/src/mesa/drivers/dri/r200/r200_sanity.c +++ b/extras/Mesa/src/mesa/drivers/dri/r200/r200_sanity.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_sanity.c,v 1.1.1.2 2004/12/10 15:05:57 alanh Exp $ */ +/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_sanity.c,v 1.2tsi Exp $ */ /************************************************************************** Copyright 2002 ATI Technologies Inc., Ontario, Canada, and @@ -41,7 +41,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r200_context.h" #include "r200_ioctl.h" #include "r200_sanity.h" -#include "radeon_reg.h" #include "r200_reg.h" /* Set this '1' to get more verbiage. diff --git a/extras/Mesa/src/mesa/drivers/dri/r200/r200_screen.c b/extras/Mesa/src/mesa/drivers/dri/r200/r200_screen.c index c5c0f1e4b..28819b58d 100644 --- a/extras/Mesa/src/mesa/drivers/dri/r200/r200_screen.c +++ b/extras/Mesa/src/mesa/drivers/dri/r200/r200_screen.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_screen.c,v 1.7tsi Exp $ */ +/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_screen.c,v 1.8tsi Exp $ */ /* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. @@ -46,7 +46,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r200_context.h" #include "r200_ioctl.h" #include "radeon_macros.h" -#include "radeon_reg.h" +#include "r200_reg.h" #include "utils.h" #include "vblank.h" diff --git a/extras/Mesa/src/mesa/drivers/dri/r200/r200_texmem.c b/extras/Mesa/src/mesa/drivers/dri/r200/r200_texmem.c index 1929397bf..21f55f00e 100644 --- a/extras/Mesa/src/mesa/drivers/dri/r200/r200_texmem.c +++ b/extras/Mesa/src/mesa/drivers/dri/r200/r200_texmem.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_texmem.c,v 1.5 2002/12/17 00:32:56 dawes Exp $ */ +/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/r200/r200_texmem.c,v 1.1.1.4tsi Exp $ */ /************************************************************************** Copyright (C) Tungsten Graphics 2002. All Rights Reserved. @@ -43,8 +43,7 @@ SOFTWARE. #include "context.h" #include "colormac.h" #include "macros.h" -#include "simple_list.h" -#include "radeon_reg.h" /* gets definition for usleep */ +#include "r200_reg.h" /* gets definition for usleep */ #include "r200_context.h" #include "r200_state.h" #include "r200_ioctl.h" @@ -73,10 +72,8 @@ r200DestroyTexObj( r200ContextPtr rmesa, r200TexObjPtr t ) for ( i = 0 ; i < rmesa->glCtx->Const.MaxTextureUnits ; i++ ) { if ( t == rmesa->state.texture.unit[i].texobj ) { rmesa->state.texture.unit[i].texobj = NULL; - remove_from_list( &rmesa->hw.tex[i] ); - make_empty_list( &rmesa->hw.tex[i] ); - remove_from_list( &rmesa->hw.cube[i] ); - make_empty_list( &rmesa->hw.cube[i] ); + rmesa->hw.tex[i].dirty = GL_FALSE; + rmesa->hw.cube[i].dirty = GL_FALSE; } } } @@ -231,7 +228,7 @@ static void r200UploadRectSubImage( r200ContextPtr rmesa, tex = (char *)texImage->Data + done * src_pitch; memset(®ion, 0, sizeof(region)); - r200AllocDmaRegion( rmesa, ®ion, lines * dstPitch, 64 ); + r200AllocDmaRegion( rmesa, ®ion, lines * dstPitch, 1024 ); /* Copy texdata to dma: */ @@ -240,10 +237,10 @@ static void r200UploadRectSubImage( r200ContextPtr rmesa, __FUNCTION__, src_pitch, dstPitch); if (src_pitch == dstPitch) { - memcpy( region.address, tex, lines * src_pitch ); + memcpy( region.address + region.start, tex, lines * src_pitch ); } else { - char *buf = region.address; + char *buf = region.address + region.start; int i; for (i = 0 ; i < lines ; i++) { memcpy( buf, tex, src_pitch ); @@ -286,8 +283,8 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t, GLuint offset; GLint imageWidth, imageHeight; GLint ret; - drmRadeonTexture tex; - drmRadeonTexImage tmp; + drm_radeon_texture_t tex; + drm_radeon_tex_image_t tmp; const int level = hwlevel + t->base.firstLevel; if ( R200_DEBUG & DEBUG_TEXTURE ) { @@ -304,26 +301,7 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t, return; } - switch (face) { - case 0: - texImage = t->base.tObj->Image[level]; - break; - case 1: - texImage = t->base.tObj->NegX[level]; - break; - case 2: - texImage = t->base.tObj->PosY[level]; - break; - case 3: - texImage = t->base.tObj->NegY[level]; - break; - case 4: - texImage = t->base.tObj->PosZ[level]; - break; - case 5: - texImage = t->base.tObj->NegZ[level]; - break; - } + texImage = t->base.tObj->Image[face][level]; if ( !texImage ) { if ( R200_DEBUG & DEBUG_TEXTURE ) @@ -380,7 +358,7 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t, t->image[face][hwlevel].data = texImage->Data; - /* Init the DRM_RADEON_TEXTURE command / drmRadeonTexture struct. + /* Init the DRM_RADEON_TEXTURE command / drm_radeon_texture_t struct. * NOTE: we're always use a 1KB-wide blit and I8 texture format. * We used to use 1, 2 and 4-byte texels and used to use the texture * width to dictate the blit width - but that won't work for compressed @@ -402,12 +380,20 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t, tex.image = &tmp; /* copy (x,y,width,height,data) */ - memcpy( &tmp, &t->image[face][hwlevel], sizeof(drmRadeonTexImage) ); + memcpy( &tmp, &t->image[face][hwlevel], sizeof(tmp) ); + /* Adjust the base offset to account for the Y-offset. This is done, + * instead of just letting the Y-offset automatically take care of it, + * because it is possible, for very large textures, for the Y-offset + * to exceede the [-8192,+8191] range. + */ + tex.offset += tmp.y * 1024; + tmp.y = 0; + LOCK_HARDWARE( rmesa ); do { ret = drmCommandWriteRead( rmesa->dri.fd, DRM_RADEON_TEXTURE, - &tex, sizeof(drmRadeonTexture) ); + &tex, sizeof(drm_radeon_texture_t) ); if (ret) { if (R200_DEBUG & DEBUG_IOCTL) fprintf(stderr, "DRM_RADEON_TEXTURE: again!\n"); |