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authorJunyan He <junyan.he@linux.intel.com>2014-01-14 16:43:42 +0800
committerZhigang Gong <zhigang.gong@intel.com>2014-01-26 17:17:26 +0800
commit6f579e53422a5e9689f500aad99e60281d73db7b (patch)
treea12ffbb16b85596ffb785846056bcfb5b734ce50 /src/cl_device_id.c
parent84459335c59a023baa5513cb091e775b75b5c0c0 (diff)
Add the device id for haswell GT.
Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Diffstat (limited to 'src/cl_device_id.c')
-rw-r--r--src/cl_device_id.c100
1 files changed, 84 insertions, 16 deletions
diff --git a/src/cl_device_id.c b/src/cl_device_id.c
index 30d16394..04267380 100644
--- a/src/cl_device_id.c
+++ b/src/cl_device_id.c
@@ -76,40 +76,108 @@ cl_get_gt_device(void)
cl_set_thread_batch_buf(NULL);
const int device_id = cl_driver_get_device_id();
-#define DECL_INFO_STRING(STRUCT, FIELD, STRING) \
+#define DECL_INFO_STRING(BREAK, STRUCT, FIELD, STRING) \
STRUCT.FIELD = STRING; \
- STRUCT.JOIN(FIELD,_sz) = sizeof(STRING);
+ STRUCT.JOIN(FIELD,_sz) = sizeof(STRING); \
+ goto BREAK;
- /* XXX we pick IVB for HSW now */
switch (device_id) {
- case PCI_CHIP_HASWELL_M:
- DECL_INFO_STRING(intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
- case PCI_CHIP_HASWELL_L:
- DECL_INFO_STRING(intel_hsw_device, name, "Intel(R) HD Graphics Haswell L");
- case PCI_CHIP_HASWELL_M0:
- DECL_INFO_STRING(intel_hsw_device, name, "Intel(R) HD Graphics Haswell M0");
- case PCI_CHIP_HASWELL_D0:
- DECL_INFO_STRING(intel_hsw_device, name, "Intel(R) HD Graphics Haswell D0");
+ case PCI_CHIP_HASWELL_D1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_D2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_D3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_S1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_S2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_S3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_M1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_M2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_M3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_D1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_D2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_D3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_S1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_S2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_S3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_M1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_M2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_SDV_M3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_D1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_D2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_D3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_S1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_S2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_S3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_M1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_M2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_ULT_M3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ /* CRW */
+ case PCI_CHIP_HASWELL_CRW_D1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_CRW_D2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_CRW_D3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_CRW_S1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_CRW_S2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_CRW_S3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_CRW_M1:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_CRW_M2:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+ case PCI_CHIP_HASWELL_CRW_M3:
+ DECL_INFO_STRING(has_break, intel_hsw_device, name, "Intel(R) HD Graphics Haswell M");
+has_break:
intel_hsw_device.vendor_id = device_id;
intel_hsw_device.platform = intel_platform;
ret = &intel_hsw_device;
break;
case PCI_CHIP_IVYBRIDGE_GT1:
- DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge GT1");
+ DECL_INFO_STRING(ivb_gt1_break, intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge GT1");
case PCI_CHIP_IVYBRIDGE_M_GT1:
- DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge M GT1");
+ DECL_INFO_STRING(ivb_gt1_break, intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge M GT1");
case PCI_CHIP_IVYBRIDGE_S_GT1:
- DECL_INFO_STRING(intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge S GT1");
+ DECL_INFO_STRING(ivb_gt1_break, intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge S GT1");
+ivb_gt1_break:
intel_ivb_gt1_device.vendor_id = device_id;
intel_ivb_gt1_device.platform = intel_platform;
ret = &intel_ivb_gt1_device;
break;
case PCI_CHIP_IVYBRIDGE_GT2:
- DECL_INFO_STRING(intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge GT2");
+ DECL_INFO_STRING(ivb_gt2_break, intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge GT2");
case PCI_CHIP_IVYBRIDGE_M_GT2:
- DECL_INFO_STRING(intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge M GT2");
+ DECL_INFO_STRING(ivb_gt2_break, intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge M GT2");
+ivb_gt2_break:
intel_ivb_gt2_device.vendor_id = device_id;
intel_ivb_gt2_device.platform = intel_platform;
ret = &intel_ivb_gt2_device;