diff options
| author | Roland Scheidegger <sroland@tungstengraphics.com> | 2009-03-05 02:07:46 +0100 |
|---|---|---|
| committer | Roland Scheidegger <sroland@tungstengraphics.com> | 2009-03-24 19:57:26 +0100 |
| commit | 18e56eb179fde28477487c63e6f9ebf7579e2cd5 (patch) | |
| tree | e0a4c6597a2c29f2a7bdfbce7b084306404018df /src/radeon_reg.h | |
| parent | 58530bf4912800f9e09ebaea42a13cff8a80c19e (diff) | |
don't convert planar yuv to packed for r200
uses 3 textures for planar yuv and does yuv->rgb conversion in the shader.
Similar to r300 code, but might have precision issues - hardware alu should
have enough precision but hardware consts are only 8bit and we'd want
at least 11.
This also enables textured video on rv250 (and also supports packed yuv
on that chip by using basically the same shader with packed data).
Diffstat (limited to 'src/radeon_reg.h')
| -rw-r--r-- | src/radeon_reg.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 247a0e7d..98b6d0b9 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -3027,6 +3027,18 @@ # define R200_TXA_REPL_ARG_B_MASK (3 << 28) # define R200_TXA_REPL_ARG_C_SHIFT 30 # define R200_TXA_REPL_ARG_C_MASK (3 << 30) +#define R200_PP_TXCBLEND_1 0x2f10 +#define R200_PP_TXCBLEND2_1 0x2f14 +#define R200_PP_TXABLEND_1 0x2f18 +#define R200_PP_TXABLEND2_1 0x2f1c +#define R200_PP_TXCBLEND_2 0x2f20 +#define R200_PP_TXCBLEND2_2 0x2f24 +#define R200_PP_TXABLEND_2 0x2f28 +#define R200_PP_TXABLEND2_2 0x2f2c +#define R200_PP_TXCBLEND_3 0x2f30 +#define R200_PP_TXCBLEND2_3 0x2f34 +#define R200_PP_TXABLEND_3 0x2f38 +#define R200_PP_TXABLEND2_3 0x2f3c #define R200_SE_VTX_FMT_0 0x2088 # define R200_VTX_XY 0 /* always have xy */ |