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Age
Commit message (
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Author
Files
Lines
2011-06-28
TCG/PPC: use stack for TCG temps
Blue Swirl
1
-2
/
+5
2011-06-28
tcg/ppc: Remove tcg_out_addi
malc
1
-5
/
+0
2011-06-26
Delegate setup of TCG temporaries to targets
Blue Swirl
1
-0
/
+2
2011-06-26
cpu-exec.c: avoid AREG0 use
Blue Swirl
1
-3
/
+3
2010-08-15
TCG: Fix Darwin/ppc calling convention recognition
Andreas Färber
1
-1
/
+1
2010-06-29
tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG.
Richard Henderson
1
-4
/
+4
2010-06-09
tcg: Make some tcg-target.c routines static.
Richard Henderson
1
-2
/
+2
2010-06-09
tcg: Add TYPE parameter to tcg_out_mov.
Richard Henderson
1
-24
/
+24
2010-04-18
tcg/ppc: Remove redundant comparison from brcond2
malc
1
-2
/
+1
2010-04-17
tcg/ppc: Fix signed versions of brcond2
malc
1
-1
/
+2
2010-04-06
tcg/ppc: Fix typo
malc
1
-1
/
+1
2010-04-06
tcg/ppc: Implment bswap16/32
malc
2
-2
/
+77
2010-04-05
tcg/ppc: Implement eqv, nand and nor
malc
2
-3
/
+17
2010-04-05
Split TLB addend and target_phys_addr_t
Paul Brook
1
-10
/
+2
2010-04-04
tcg/ppc: Fix not_i32
malc
1
-1
/
+1
2010-03-26
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Richard Henderson
1
-3
/
+3
2010-03-26
tcg: Allow target-specific implementation of NOR.
Richard Henderson
1
-0
/
+1
2010-03-26
tcg: Allow target-specific implementation of NAND.
Richard Henderson
1
-0
/
+1
2010-03-26
tcg: Allow target-specific implementation of EQV.
Richard Henderson
1
-0
/
+1
2010-03-26
tcg: Use TCGCond where appropriate.
Richard Henderson
1
-3
/
+4
2010-03-26
tcg: Name the opcode enumeration.
Richard Henderson
1
-1
/
+1
2010-03-26
remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
Paolo Bonzini
1
-2
/
+0
2010-03-13
tcg/ppc[64]: Only define addend load helpers in softmmu case
malc
1
-0
/
+3
2010-02-27
tcg/ppc: Fix right rotation
malc
1
-1
/
+2
2010-02-23
tcg/ppc: Fix typo
malc
1
-1
/
+1
2010-02-22
tcg/ppc: Implement some of the optional ops
malc
2
-8
/
+88
2010-02-22
tcg: fix build on 32-bit hppa, ppc and sparc hosts
Jay Foad
1
-2
/
+0
2010-02-20
tcg: Add comments for all optional instructions not implemented.
Richard Henderson
1
-1
/
+9
2010-02-20
tcg/ppc: Consistently use calling convention selection macros
malc
1
-12
/
+12
2010-02-20
Use ppc host calling convention definitions to set TCG_TARGET_CALL_{ALIGN_ARG...
Juergen Lock
1
-3
/
+3
2010-02-07
tcg/ppc32: proper setcond implementation
malc
1
-25
/
+25
2010-02-07
tcg/ppc32: implement setcond[2]
malc
1
-14
/
+157
2009-09-27
tcg/ppc: always use tcg_out_call
malc
1
-20
/
+10
2009-09-06
When targeting PPU use rlwinm instead of andi. if possible
malc
1
-8
/
+54
2009-07-20
Fix rbase initialization
malc
1
-1
/
+1
2009-07-18
PPC 32/64 GUEST_BASE support
malc
2
-21
/
+65
2009-07-18
Fix LHZX opcode value
malc
1
-1
/
+1
2009-04-11
Whack [LS]MW
malc
1
-3
/
+0
2009-04-11
Remove reserved registers from tcg_target_reg_alloc_order
malc
1
-3
/
+0
2009-03-08
Prune unused TCG_AREGs
blueswir1
1
-1
/
+0
2009-02-11
Add missing r24..r26 to calle save registers
malc
1
-0
/
+5
2009-01-26
R13 is reserved for small data area pointer by SVR4 PPC ABI
malc
1
-0
/
+5
2008-12-22
Use the ARRAY_SIZE() macro where appropriate.
malc
1
-1
/
+1
2008-12-10
Introduce and use cache-utils.[ch]
malc
1
-21
/
+0
2008-11-18
Preliminary AIX support
malc
2
-2
/
+52
2008-11-12
Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSET
malc
1
-4
/
+4
2008-10-05
Add some missing static and const qualifiers, reg_names only used if NDEBUG set
blueswir1
1
-0
/
+2
2008-09-22
Avoid clobbering input register in qemu_ld64+bswap+useronly case
malc
1
-13
/
+6
2008-08-30
Fix some warnings that would be generated by gcc -Wredundant-decls
blueswir1
1
-9
/
+2
2008-08-21
Relax qemu_ld/st constraints for !SOFTMMU case
malc
1
-1
/
+14
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