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path: root/target-mips/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl1-1/+1
2011-07-30exec.h cleanupBlue Swirl1-0/+2
2011-07-20Fix unassigned memory access handlingBlue Swirl1-2/+2
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl1-0/+24
2011-04-03Fix trivial "endianness bugs"Stefan Weil1-1/+1
2010-12-27target-mips: fix host CPU consumption when guest is idleAurelien Jarno1-0/+8
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil1-1/+2
2010-08-06mips: Add support for VInt and VEIC irq modesEdgar E. Iglesias1-0/+23
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno1-0/+3
2010-07-24mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias1-3/+0
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-1/+0
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini1-7/+0
2010-06-09target-mips: add microMIPS exception handler supportNathan Froyd1-0/+1
2010-03-12Target specific usermode cleanupPaul Brook1-1/+10
2010-02-06target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno1-2/+2
2009-12-13target-mips: add new HFLAGs for JALX and 16/32-bit delay slotsNathan Froyd1-19/+28
2009-11-30target-mips: add a function to do virtual -> physical translationsAurelien Jarno1-0/+2
2009-11-22target-mips: fix physical address type in MMU functionsAurelien Jarno1-4/+4
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno1-0/+2
2009-11-22target-mips: rename CP0_LLAddr into lladdrAurelien Jarno1-1/+1
2009-11-14mips: fix cpu_reset memory leakBlue Swirl1-2/+3
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-8/+9
2009-10-01Get rid of _t suffixmalc1-9/+8
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
2009-07-27change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela1-1/+1
2009-07-09MIPS atomic instructionsPaul Brook1-0/+5
2009-07-09MIPS usermode TLS registerPaul Brook1-0/+5
2009-03-29target-mips: optimize gen_compute_branch()aurel321-1/+1
2009-03-08target-mips: rename helpers from do_ to helper_aurel321-8/+8
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook1-1/+2
2008-12-20Fix remaining compiler warnings for mips targets.ths1-1/+18
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori1-0/+8
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori1-5/+7
2008-11-11target-mips: optimize gen_op_addr_add() (2/2)aurel321-6/+7
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir11-1/+1
2008-09-18Move the active FPU registers into env again, and use more TCG registersths1-4/+7
2008-07-23Less hardcoding of TARGET_USER_ONLY.ths1-8/+1
2008-07-09Use temporary registers for the MIPS FPU emulation.ths1-7/+1
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-2/+0
2008-06-30Move CPU save/load registration to common code.pbrook1-0/+2
2008-06-29Add instruction counter.pbrook1-0/+6
2008-06-27More efficient target register / TC accesses.ths1-37/+40
2008-06-24Remove remaining uses of T0 in the MIPS target.ths1-3/+0
2008-06-24T1 is now dead.ths1-1/+0
2008-06-11Move FP TNs to cpu env.ths1-5/+6
2008-05-30Fix typo.pbrook1-1/+1
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook1-0/+10
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-2/+0
2008-05-28moved halted field to CPU_COMMONbellard1-2/+0
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