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authorAvi Kivity <avi@redhat.com>2009-08-09 19:44:56 +0300
committerAnthony Liguori <aliguori@us.ibm.com>2009-08-24 08:01:42 -0500
commit1632dc6a8f6e8662f4a203b6fb8c0371ca216946 (patch)
tree49edaaf0dd65f87b02300f33cd0b3bb97bb774ce /hw/ioapic.c
parent1452411b25fb207e7f442e5a5128f34b4939d31c (diff)
Route IOAPIC interrupts via ISA bus
Instead of calling the IOAPIC from the PIC, raise IOAPIC irqs via the ISA bus. As a side effect, IOAPIC lines 16-23 are enabled. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/ioapic.c')
-rw-r--r--hw/ioapic.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/ioapic.c b/hw/ioapic.c
index a5cdd5d9a..998894de1 100644
--- a/hw/ioapic.c
+++ b/hw/ioapic.c
@@ -241,9 +241,10 @@ static CPUWriteMemoryFunc *ioapic_mem_write[3] = {
ioapic_mem_writel,
};
-IOAPICState *ioapic_init(void)
+qemu_irq *ioapic_init(void)
{
IOAPICState *s;
+ qemu_irq *irq;
int io_memory;
s = qemu_mallocz(sizeof(IOAPICState));
@@ -255,6 +256,7 @@ IOAPICState *ioapic_init(void)
register_savevm("ioapic", 0, 1, ioapic_save, ioapic_load, s);
qemu_register_reset(ioapic_reset, s);
+ irq = qemu_allocate_irqs(ioapic_set_irq, s, IOAPIC_NUM_PINS);
- return s;
+ return irq;
}