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| author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2010-02-20 19:17:29 +0100 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2010-02-20 19:17:29 +0100 |
| commit | 4ffb9ae2e1227d2ffa14355acbecd37677fe0374 (patch) | |
| tree | 6ffecf5893ad466b1751342e5e7786b281a6ff53 | |
| parent | ff21f70afd35c3b26e4ef559c83c4a70113d1ec2 (diff) | |
cris: Mask interrupts on dslots for CRISv10.
CRISv10 cores (unlike v32) do not take any interrupts while delayed
jumps are pending (delay slots).
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
| -rw-r--r-- | target-cris/translate_v10.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 9a29c5117..9abf1a837 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -1187,6 +1187,10 @@ static unsigned int crisv10_decoder(DisasContext *dc) dc->cpustate_changed = 1; } + /* CRISv10 locks out interrupts on dslots. */ + if (dc->delayed_branch == 2) { + cris_lock_irq(dc); + } return insn_len; } |