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path: root/hw/mips_timer.c
AgeCommit message (Expand)AuthorFilesLines
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-3/+1
2009-01-08target-mips: CP0 Random register improvementsaurel321-3/+8
2008-09-14MIPS: remove empty cpu_mips_irqctrl_init()aurel321-4/+0
2008-06-29Add instruction counter.pbrook1-0/+5
2008-04-11Optimize MIPS timer read/write functionsaurel321-31/+25
2007-11-17Break up vl.h.pbrook1-1/+3
2007-09-25Timer start/stop implementation, by Aurelien Jarno.ths1-5/+24
2007-09-06Partial support for 34K multithreading, not functional yet.ths1-1/+1
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths1-1/+1
2007-04-07Unify IRQ handling.pbrook1-2/+2
2007-04-05Fix disabling of the Cause register for R2.ths1-11/+11
2007-03-18Fix BD flag handling, cause register contents, implement some more bitsths1-0/+7
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths1-4/+2
2006-12-06Move the MIPS CPU timer in a seperate file, by Alec Voropay.ths1-0/+85