diff options
Diffstat (limited to 'utils')
-rw-r--r-- | utils/TableGen/CodeGenSchedule.cpp | 11 | ||||
-rw-r--r-- | utils/TableGen/CodeGenSchedule.h | 3 |
2 files changed, 11 insertions, 3 deletions
diff --git a/utils/TableGen/CodeGenSchedule.cpp b/utils/TableGen/CodeGenSchedule.cpp index c52d3b0e9fc..57a426bffb3 100644 --- a/utils/TableGen/CodeGenSchedule.cpp +++ b/utils/TableGen/CodeGenSchedule.cpp @@ -1429,6 +1429,9 @@ void CodeGenSchedModels::verifyProcResourceGroups(CodeGenProcModel &PM) { // Collect and sort WriteRes, ReadAdvance, and ProcResources. void CodeGenSchedModels::collectProcResources() { + ProcResourceDefs = Records.getAllDerivedDefinitions("ProcResourceUnits"); + ProcResGroups = Records.getAllDerivedDefinitions("ProcResGroup"); + // Add any subtarget-specific SchedReadWrites that are directly associated // with processor resources. Refer to the parent SchedClass's ProcIndices to // determine which processors they apply to. @@ -1523,6 +1526,9 @@ void CodeGenSchedModels::collectProcResources() { dbgs() << '\n'); verifyProcResourceGroups(PM); } + + ProcResourceDefs.clear(); + ProcResGroups.clear(); } void CodeGenSchedModels::checkCompleteness() { @@ -1652,8 +1658,8 @@ Record *CodeGenSchedModels::findProcResUnits(Record *ProcResKind, return ProcResKind; Record *ProcUnitDef = nullptr; - RecVec ProcResourceDefs = - Records.getAllDerivedDefinitions("ProcResourceUnits"); + assert(!ProcResourceDefs.empty()); + assert(!ProcResGroups.empty()); for (RecIter RI = ProcResourceDefs.begin(), RE = ProcResourceDefs.end(); RI != RE; ++RI) { @@ -1668,7 +1674,6 @@ Record *CodeGenSchedModels::findProcResUnits(Record *ProcResKind, ProcUnitDef = *RI; } } - RecVec ProcResGroups = Records.getAllDerivedDefinitions("ProcResGroup"); for (RecIter RI = ProcResGroups.begin(), RE = ProcResGroups.end(); RI != RE; ++RI) { diff --git a/utils/TableGen/CodeGenSchedule.h b/utils/TableGen/CodeGenSchedule.h index 62601d941bc..7a236ad0dd8 100644 --- a/utils/TableGen/CodeGenSchedule.h +++ b/utils/TableGen/CodeGenSchedule.h @@ -241,6 +241,9 @@ class CodeGenSchedModels { // Any inferred SchedClass has an index greater than NumInstrSchedClassses. unsigned NumInstrSchedClasses; + RecVec ProcResourceDefs; + RecVec ProcResGroups; + // Map each instruction to its unique SchedClass index considering the // combination of it's itinerary class, SchedRW list, and InstRW records. typedef DenseMap<Record*, unsigned> InstClassMapTy; |