[python] Add markup option to disassembler

Patch contributed by Wladimir J. van der Laan <laanwj@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169102 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 23 insertions, 1 deletions

diff --git a/bindings/python/llvm/disassembler.py b/bindings/python/llvm/disassembler.py
index 5030b989a94..dcef9ac2690 100644
--- a/bindings/python/llvm/disassembler.py
+++ b/bindings/python/llvm/disassembler.py
@@ -31,6 +31,9 @@ __all__ = [
 lib = get_library()
 callbacks = {}
 
+# Constants for set_options
+Option_UseMarkup = 1
+
 class Disassembler(LLVMObject):
     """Represents a disassembler instance.
 
@@ -113,6 +116,10 @@ class Disassembler(LLVMObject):
             address += result
             offset += result
 
+    def set_options(self, options):
+        if not lib.LLVMSetDisasmOptions(self, options):
+            raise Exception('Unable to set all disassembler options in %i' % options)
+
 
 def register_library(library):
     library.LLVMCreateDisasm.argtypes = [c_char_p, c_void_p, c_int,
@@ -125,6 +132,10 @@ def register_library(library):
             c_uint64, c_uint64, c_char_p, c_size_t]
     library.LLVMDisasmInstruction.restype = c_size_t
 
+    library.LLVMSetDisasmOptions.argtypes = [Disassembler, c_uint64]
+    library.LLVMSetDisasmOptions.restype = c_int
+
+
 callbacks['op_info'] = CFUNCTYPE(c_int, c_void_p, c_uint64, c_uint64, c_uint64,
                                  c_int, c_void_p)
 callbacks['symbol_lookup'] = CFUNCTYPE(c_char_p, c_void_p, c_uint64,
diff --git a/bindings/python/llvm/tests/test_disassembler.py b/bindings/python/llvm/tests/test_disassembler.py
index 545e8668b6c..46d12f70562 100644
--- a/bindings/python/llvm/tests/test_disassembler.py
+++ b/bindings/python/llvm/tests/test_disassembler.py
@@ -1,6 +1,6 @@
 from .base import TestBase
 
-from ..disassembler import Disassembler
+from ..disassembler import Disassembler, Option_UseMarkup
 
 class TestDisassembler(TestBase):
     def test_instantiate(self):
@@ -26,3 +26,14 @@ class TestDisassembler(TestBase):
 
         self.assertEqual(instructions[0], (0, 3, '\tjcxz\t-127'))
         self.assertEqual(instructions[1], (3, 2, '\taddl\t%eax, %edi'))
+
+    def test_set_options(self):
+        sequence = '\x10\x40\x2d\xe9'
+        triple = 'arm-linux-android'
+
+        disassembler = Disassembler(triple)
+        disassembler.set_options(Option_UseMarkup)
+        count, s = disassembler.get_instruction(sequence)
+        print s
+        self.assertEqual(count, 4)
+        self.assertEqual(s, '\tpush\t{<reg:r4>, <reg:lr>}')