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authorRajendra Nayak <rnayak@ti.com>2008-09-26 17:49:56 +0530
committerKevin Hilman <khilman@deeprootsystems.com>2009-11-11 14:42:25 -0800
commit61255ab9e853ddbbe092328c30921d2ba9434134 (patch)
treefb98af6ee37546e36ebce77da40d4a6fd99aee78 /arch/arm/mach-omap2/sleep34xx.S
parent57f277b0122722ffa1de1b53aceb70646ce9a8e1 (diff)
OMAP3: PM: MPU off-mode support
Adds a 'save_state' option when calling into SRAM idle function and adds some minor cleanups of SRAM asm code. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/sleep34xx.S')
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S11
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 6a749f2fea6..f8d3834bf68 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -36,12 +36,11 @@
OMAP3430_PM_PREPWSTST)
#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
OMAP3430_PM_PREPWSTST)
-#define PM_PWSTCTRL_MPU_P OMAP34XX_PRM_REGADDR(MPU_MOD, PM_PWSTCTRL)
+#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + PM_PWSTCTRL
#define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is
* available */
-#define SCRATCHPAD_BASE_P OMAP343X_CTRL_REGADDR(\
- OMAP343X_CONTROL_MEM_WKUP +\
- SCRATCHPAD_MEM_OFFS)
+#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
+ + SCRATCHPAD_MEM_OFFS)
#define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
.text
@@ -96,7 +95,7 @@ loop:
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore:
- /* b restore*/ @ Enable to debug restore code
+ /* b restore*/ @ Enable to debug restore code
/* Check what was the reason for mpu reset and store the reason in r9*/
/* 1 - Only L1 and logic lost */
/* 2 - Only L2 lost - In this case, we wont be here */
@@ -416,8 +415,6 @@ scratchpad_base:
.word SCRATCHPAD_BASE_P
sdrc_power:
.word SDRC_POWER_V
-context_mem:
- .word 0x803E3E14
clk_stabilize_delay:
.word 0x000001FF
assoc_mask: