diff options
author | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:14 -0700 |
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committer | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:14 -0700 |
commit | 2ace831ffc8feaffb8bc03da89ff43d948efdc97 (patch) | |
tree | 4a75814c417ffe94dd2505585305378b7f04b40e /arch/arm/mach-omap2/prm44xx.c | |
parent | f0611a5c220e50dec65041b10bd2fe9484f061a6 (diff) |
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm44xx.c')
-rw-r--r-- | arch/arm/mach-omap2/prm44xx.c | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 697b58f8e4a..c016ae4cbad 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -15,6 +15,7 @@ #include <linux/delay.h> #include <linux/errno.h> #include <linux/err.h> +#include <linux/io.h> #include <plat/common.h> #include <plat/cpu.h> @@ -29,6 +30,70 @@ */ #define OMAP4_RST_CTRL_ST_OFFSET 4 +/* PRM low-level functions */ + +/* Read a register in a CM/PRM instance in the PRM module */ +u32 omap4_prm_read_inst_reg(s16 inst, u16 reg) +{ + return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg)); +} + +/* Write into a register in a CM/PRM instance in the PRM module */ +void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg) +{ + __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg)); +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) +{ + u32 v; + + v = omap4_prm_read_inst_reg(inst, reg); + v &= ~mask; + v |= bits; + omap4_prm_write_inst_reg(v, inst, reg); + + return v; +} + +/* Read a PRM register, AND it, and shift the result down to bit 0 */ +/* XXX deprecated */ +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) +{ + u32 v; + + v = __raw_readl(reg); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +/* XXX deprecated */ +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) +{ + u32 v; + + v = __raw_readl(reg); + v &= ~mask; + v |= bits; + __raw_writel(v, reg); + + return v; +} + +u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg) +{ + return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg); +} + +u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) +{ + return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); +} + /** * omap4_prm_is_hardreset_asserted - read the HW reset line state of * submodules contained in the hwmod module |