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authorRusty Russell <rusty@rustcorp.com.au>2008-04-06 17:23:38 +1000
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-06 16:10:40 -0700
commit64ba4f230d30b089bc89db2e59d02c1efa5ac769 (patch)
tree71cd66ab95e1ba7e43800e79433c7177e0864cc1
parent3bf48468fe84468a148e4f19465e0a725c0f977b (diff)
Fix booting pentium+ with dodgy TSC
We handle a broken tsc these days, so no need to panic. We clear the TSC bit when tsc_init decides it's unreliable (eg. under lguest w/ bad host TSC), leading to bogus panic. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--arch/x86/kernel/cpu/bugs.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 027e5c003b1..170d2f5523b 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -143,14 +143,6 @@ static void __init check_config(void)
#endif
/*
- * If we configured ourselves for a TSC, we'd better have one!
- */
-#ifdef CONFIG_X86_TSC
- if (!cpu_has_tsc)
- panic("Kernel compiled for Pentium+, requires TSC feature!");
-#endif
-
-/*
* If we were told we had a good local APIC, check for buggy Pentia,
* i.e. all B steppings and the C2 stepping of P54C when using their
* integrated APIC (see 11AP erratum in "Pentium Processor